Sun makes picoJava core available for evaluation

Sun makes picoJava core available for evaluation
By Michael Santarini, EE Times
April 12, 1999 (10:11 a.m. EST)
URL: http://www.eetimes.com/story/OEG19990412S0004

Sun Microsystems Inc. has made its picoJava processor core immediately available via its Sun Community Source Licensing (SCSL) model, following up on a March announcement that picoJava and implementations of the Sparc architecture would soon be offered through SCSL.

The program makes major microprocessor intellectual-property core technology accessible to outside developers during evaluation and development. Since the March announcement, according to Sun, more than 200 registrations for community source licensing of the picoJava and Sparc cores have come in from third-party vendors, chip developers, EDA software vendors, commercial OEMs, universities and research organizations.

The SCSL model allows access to picoJava microprocessor source files without fees during the initial evaluation and development phases. Via the Web, Sun provides key source files, including micro-architecture specifications; a programmer's reference manual; a reg ister-transfer-level (RTL) verification model; and a timing-accurate simulator.

According to Sun, third-party vendors that have expressed interest in developing for picoJava include Cadence Design Systems, Chiplogic, Cygnus Solutions, Infinite Technology, jCan, Lavalogic MetaWare, Phoenix Technologies, Silicon Access Technology, SureFire Verification and VAutomation. In addition, such universities as Carnegie-Mellon have expressed interest in the program, Sun said.

Visit www.sun.com/microelectronics/communitysource.

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Packet Engines Intellectual Property Group (Spokane, Wash.) has released the PE-Mstat core, a general-purpose register-based statistics gathering module. The Verilog-based soft core has a low-gate-count, register-based design with a configurable architecture.

According to the company, the core has flexible support for the Simple Network Management Protocol, remote monitoring and other management information bases. PE-Mstat has been optimized for Gigabit network interface cards, multiport switch/routers and LAN-on-motherboard products.

The reusable core is compatible with Packet Engines' Ethernet medium-access-control products, including the PE-MACMII, PE-GMAC and PE-MCXMAC cores. The PE-MSTAT module is provided as Verilog RTL source code with a behavioral-model test bench.

Access www.packetengines.com/ip.

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The Western Design Center (WDC; Mesa, Ariz.) and Novatek Microelectronics Corp. (Hsin-Chu, Taiwan) announced that Novatek has successfully produced W65C02S silicon on UMC Group's 0.35-micron process.

The effort is claimed to have resulted in an 8-bit microprocessor core size of 0.41 mm2 after scaling WDC's original GDSII layers and selectively biasing to match UMC Group's targeted 0.35-micron rules. WDC said its original hard core design has been successfully retargeted and runs at 1.2, 0.8, 0 .6, 0.5 and 0.35 micron.

Visit www.umcgroup.com.