SoC-e's 1588Tiny IP Core now supports Layer-3 PTP operation
September 17, 2018 -- SoCe keeps pushing the improvement of its IP Cores in order to fit the the needs of their customers. This time, we are happy to announce that the last update of the 1588Tiny IP Core adds support for Layer-3 PTP Operation.
1588Tiny is a hardware-only IEEE 1588-2008 V2 Slave Only compliant clock synchronization IP core for Xilinx FPGAs. It is focused on equipments that require basic IEEE1588 functionality using the minimum resources. 1588Tiny is capable of accurately timestamp IEEE 1588 frames and provide a synchronized clock using only hardware modules (accuracy in the nanosecond range). Neither an embedded processor, nor a generic Ethernet MAC are required. Furthermore, 1588Tiny includes an optimized Ethernet MAC to process PTP frames.
IEEE 1588 Precision Time Protocol (PTP) is a packet-based protocol for synchronizing clocks on a local area network (LAN). This protocol is able to synchronize networked clocks with an accuracy down to the nanosecond range.
Related Semiconductor IP
- syn1588® enabled IEEE 1588 compliant clock synchronisation
- IEEE 802.11n/ac/ax Encoder and Decoder
- IEEE 802.15.3c Irregular LDPC(672,336), LDPC(672,504), LDPC(672,588) encoder and decoder
- IEEE 802.15.3c (60 GHz PHY) Multi-Gbit/s LDPC Decoder
- IEEE 802.1AS Software Stack
Related News
- CAST Expands Security IP Portfolio with High Performance SM4 Cipher Core
- Creonic Updates Doppler Channel IP Core with Extended Frequency Band and Sampling Range
- DCD-SEMI Brings Full ASIL-D Functional Safety to Entire Automotive IP Cores Portfolio
- Kerala Positions Design and IP at Core of Chip Strategy
Latest News
- Analog Bits Demonstrates Real-Time On-Chip Power Sensing and Delivery on TSMC N2P Process at TSMC 2026 Technology Symposiums
- TES offers a High-Frequency Synthesizer and Clock Generator IP for X-FAB XT018 - 0.18µm BCD-on-SOI technology
- Faraday Delivers IP Solutions to Enable Endpoint AI Based on UMC’s 28nm SST eFlash
- AiM Future Partners with Metsakuur Company to Commercialize NPU-Integrated Hardware
- ESD Alliance Reports Electronic System Design Industry Posts $5.5 Billion in Revenue in Q4 2025