Silicon Interfaces Announces USB 2.0 Function Controller OVA Checker AIP Intellectual Property

CAMPBELL, Calif. - August 10, 2005 - Silicon Interfaces, a high-end design services and leading provider for IP’s in Europe, USA and Japan, under their IP Development Program - Silicon Cores: Core to the Intelligent Systems™, today announced the availability of USB 2.0 OVA Checker IP, intellectual property (IP). The SI20USBOVA20, USB 2.0 OVA IP increases the portfolio of Silicon Interfaces IP’s.

USB 2.0 Function Controller Checker OVA IP is fully documented off the shelf component for the Developers of the USB 2.0 compliant Function Controller. USB 2.0 OpenVera Assertions based Checker IP provides a concise, declarative mechanism to code the specification of sequences of events and activities of USB 2.0 Bus Protocol.

USB 2.0 OVA protocol rule Checker can work in a standalone mode i.e., can be plugged in any design verification environment, which uses the standard Protocol without disturbing the structure.

SI20USBOVA20, USB2.0 OVA IP Features

• Fully compliant with the Universal Serial Bus Rev.2.0 specification. It accurately verifies the USB 2.0 protocol
• The Checker AIP follows the OpenVera unified flow for formal tools
• The assertions are checked with the Universal Transceiver Macrocell Interface on the UTM side
• The assertions are checked with the Generic Microcontroller Interface on Microcontroller side
• Provides monitoring of signals and data in transmit and receive directions
• Provides various error notifications based on the part of the protocol that gets violated such as PID and CRC errors
• Supports Host, Hub and Device properties
• Full programmability and versatility of the AIP allows connection to any standard USB device
• Categorization of templates such as Host, Hub, Device, HostHubDevice, UTMI and UTMI16 allows selective turning ON and OFF of features while testing
• The IP monitors the various transactions and their sequences
• Provides transmit and receive sequencing error notification
• Provides monitoring of signals and timings for reset, suspend and remote wake-up from the Host side
• Provides monitoring of the Low speed, Full speed and High speed ports for all types of packets, fields, transactions and transfers
• The checker IP incorporates layered approach

For a complete listing of SI20USBOVA20, USB 2.0 OVA IP features and pricing visit the Silicon Cores web site at http://www.siliconcores.com

Availability

The SI20USBOVA20, USB 2.0 OVA IP is available now

About USB 2.0 OVA Checker AIP

OpenVera Assertions (OVA) provide fast and accurate way to simplify and speed up the device verification task. In a complex design process, verification may take up to 70% of the development time. OVA Checker AIP speeds up the verification process, thereby optimizing cost and time to market.

USB 2.0 OVA AIP Checker is developed using the abstraction in OVA syntax that is used in dynamic simulation of USB 2.0 based design.

Product Specifications

• The AIP can be adapted to test a standard USB device in Synopsys Magellan Formal Verification environment
• Supports PING Protocol
• Supports SPLIT transactions
• It can work with either 8-bit or 16-bit standard USB devices

About Silicon Interfaces

Silicon Interfaces has experience in verification solutions and developing IP for Fabric Channel Interconnect, Telecom and Networking domains, including Bluetooth Baseband, Gigabit Ethernet MAC, SONET Framer STS-1/3, 1394, USB2 Function Controller, USB On-The-Go, Infiniband, 8530, 8051, 7990, UART, Rapid IO and 802.11 a/b and g MAC. Currently, our Roadmap IPs are PCI-Express, 10 Giga and SONET STS Framer –12. The IPs has had considerable maturity based on certification, targets to various FPGA devices and ASIC libraries, silicon area optimization, silicon prototyping and testing. Also available is OVA VIP’s and an extensive driver development program in order to offer a packaged solution to the customer. For more information please visit www.siliconcores.com