Samsung Electronics on Track for 10nm FinFET Process Technology Production Ramp-up
March 15, 2017 -- Samsung Electronics, a world leader in advanced semiconductor technology, announced today that its production ramp-up of the 10-nanometer (nm) FinFET process technology is on track with steady high yield to meet customer needs on schedule.
Samsung has shipped more than 70,000 silicon wafers of its first-generation 10nm LPE (Low Power Early) to date. The company began the industry’s first mass production of 10LPE last October.
Back in 2015, Samsung introduced the industry’s first 14nm FinFET LPE technology for mobile applications based on 3D FinFET structure. Since then, Samsung has successfully delivered further enhancements in power, performance and scalability for both 14nm and 10nm FinFET technology.
“Samsung’s 10nm LPE is a game changer in the foundry industry. Following the 10LPE version, the 10nm LPP and LPU will enter mass production by the end of the year and next year, respectively.” said Jongshik Yoon, Executive Vice President and Head of Foundry Business at Samsung Electronics. “We will continue to offer the most competitive process technology in the industry.”
Samsung Electronics has also announced the addition of the 8nm and the 6nm process technologies to its current process roadmap. Samsung’s 8nm and 6nm offerings will provide greater scalability, performance and power advantages when compared to existing process nodes. The 8nm and the 6nm will inherit all innovations from the latest 10nm and the 7nm technologies with design infrastructure enhancements to meet various customer needs and provide further cost competitiveness.
Samsung’s foundry technology roadmap and technical details, including the newest 8nm and the 6nm, will first be open to its customers and partners at the upcoming U.S Samsung Foundry Forum scheduled for May 24, 2017.
Related Semiconductor IP
- JPEG XL Encoder
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
- MIPI SoundWire I3S Peripheral IP
- ML-DSA Digital Signature Engine
Related News
- TSMC Certifies Synopsys IC Compiler II for 10-nm FinFET Production and 7-nm Early Design Starts
- Synopsys' Custom Compiler Certified for TSMC 10-nm and 7-nm FinFET Process Nodes
- Silicon Creations Taps Silvaco's Custom Design Flow for 10nm FinFET Designs
- eMemory's NeoFuse IP Verified in TSMC 10nm FinFET Process
Latest News
- Are Synopsys Layoffs a Harbinger of the AI-Assisted Design Era?
- EnSilica to develop quantum-resilient secure processor chip for critical national infrastructure applications backed by £5m UK Government ‘Contract for Innovation’
- CAST Introduces JPEG XL Encoder IP Core for High- Quality, On-Camera Still-Image Compression
- PGC Strengthens Cloud and AI ASIC Acceleration with Synopsys’ Next-Generation Interface and Memory IP on Advanced Nodes
- IntelPro Licenses Ceva Wi-Fi 6 and Bluetooth 5 IPs to Launch AIoT Matter-Ready SoCs