Qualitas Semiconductor Announces First Domestic Development of PCIe 6.0 PHY IP
SEOUL, South Korea – July 16, 2024 -- QUALITAS SEMICONDUCTOR CO., LTD. (hereinafter referred to as QUALITAS) (QUALITAS, KOSDAQ: 432720), a leading provider of high-speed interface IP, has announced the successful development of its PCIe 6.0 PHY IP, a notable achievement in advancing peripheral component interconnect technology. This solution, designed using 5nm process technology, meets the high bandwidth and speed requirements essential for AI-era data transfer.
The newly developed PCIe 6.0 PHY IP by Qualitas supports transmission speeds of up to 64GT/s per lane, and when utilizing up to 16 lanes, it can handle data transfers of up to 256GB/s. This capability makes it ideal for demanding applications in data centers and autonomous driving technologies, where high-speed data processing is crucial. To achieve these speeds, Qualitas has incorporated 100G PAM4 signaling technology, placing it at the forefront of global tech competitiveness.
Key Features
- 5nm low power enhanced CMOS device technology
- 1.8V±5%, 0.85V±5% dual power supply
- Compliant to PCIe Base 6.0 and PIPE 6.1 specification
- Support Gen1, Gen2, Gen3, Gen4, Gen5 and Gen6
- Channel Configuration for Data Lanes
- Common (CMN) and 1, 2 or 4 Data Lanes
- Support the following transmitter pre-emphasis levels
- - 3.5/-6dB for Gen1 and Gen2
- Multi-tap FIR with resolution of 1/63 for Gen3 to Gen6
- Support CTLE, DSP-based multi-tap FFE and 1-tap DFE for channel equalization in receiver
- Support adaptive channel equalization
- 100MHz reference clock is required (Support differential input buffer)
- Built-in self test feature capable of generating and checking PRBS patterns
- PCS included in PHY hardmacro

[Qualitas PCIe 6.0 PHY IP Block Diagram]
Qualitas Semiconductor, having already secured its position by licensing its PCIe 4.0 PHY IP in 8nm process in 2021 and forging successful licensing agreements with Chinese customer this year, is committed to further enhancing its portfolio. Dr. Duho Kim, CEO of Qualitas, expressed pride in the development of this high-value IP and encouraged the industry to watch for Qualitas's upcoming milestones in the semiconductor IP market.
About Qualitas
Qualitas is a leader in high-speed interconnect technology, which is a key infrastructure of the 4th Industrial Revolution, encompassing AI, mobile devices, automotive systems and displays. Qualitas specializes in high-speed interconnect circuit design, as well as ultra-fine semiconductor process design and verification. Qualitas operates our business through the licensing of high-speed interface IP and by providing comprehensive design services. Moreover, Qualitas has established a robust design methodology to ensure high reliability in ultra-fine semiconductor processes. With a proven track record in developing and mass-producing cutting-edge semiconductors, our expertise spans the most advanced technologies.
For more information visit the Qualitas Semiconductor website: www.q-semi.com
Related Semiconductor IP
- PCIe 6.0 PHY, SS SF2A x4 1.2V, N/S for Automotive, ASIL B Random, AEC-Q100 Grade 2
- PCIe 6.0 PHY G2 , SS SF4X x4, North/South (vertical) poly orientation
- PCIe 6.0 PHY, TSMC N3A x4 1.2V, North/South (vertical) poly orientation for Automotive, ASIL B Random, AEC-Q100 Grade 2
- PCIe 6.0 PHY, TSMC N6 x2 1.2V, North/South (vertical) poly orientation
- PCIe 6.0 PHY, TSMC N6 x4 1.2V, North/South (vertical) poly orientation
Related News
- Qualitas Semiconductor Demonstrates Live of PCIe Gen 6.0 PHY and UCIe v2.0 Solutions at ICCAD 2025
- Qualitas Semiconductor Signs PCIe Gen 4.0 PHY IP License Agreement with Leading Chinese Fabless Customer
- Qualitas Semiconductor Expands Global Presence with 4nm UCIe and PCIe Gen 6.0 IP Licensing Agreement in the U.S. AI Market
- Qualitas Semiconductor and Verisilicon signed a licensing agreement for 4nm PCIe 6.0 PHY IP
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