Phoenix spin-off to sell standard IP cores

Phoenix spin-off to sell standard IP cores

EETimes

Phoenix spin-off to sell standard IP cores
By Michael Santarini, EE Times
December 7, 1999 (5:55 p.m. EST)
URL: http://www.eetimes.com/story/OEG19991207S0088

SAN JOSE, Calif. — After weathering a storm that blew most of its intellectual property (IP) competitors off the map, Phoenix Technologies Inc. this week officially announced plans to spin off its Semiconductor IP Division into a wholly owned subsidiary called inSilicon.

Wayne Cantwell, former senior vice president and general manager of the IP Division, will head the new company, which will offer standard IP cores for USB, 10/100 Ethernet, 1394, PCI, PCI-X, IrDA and AGP, as well as system software for system-on-chip designs and embedded systems. The new company will consist largely of employees that Phoenix had gained in its acquisition of standards-based IP companies Virtual Chips and Sand Microelectronics.

As a wholly owned subsidiary, inSilicon is in a position to dominate the standards IP market. Gary Smith, chief EDA analyst at research company Dataquest Inc., said the new company will effectively become the fourth largest revenue mak er in the IP industry, trailing ARM, MIPS and Synopsys, respectively. Smith said Phoenix held 8 percent of the overall IP market and a large majority of the standards-based IP market in 1998.

Phoenix and inSilicon are currently in a quiet period and declined to reveal further details of the spin-off. But in a recent conference call with financial analysts, Phoenix said it planned to release a small amount of stock for inSilicon but would remain a majority shareholder.

In addition to announcing its spin-off, inSilicon took the wraps off its Virtual Component Interface-compliant bus architecture, which it initially introduced last month at Virtual Socket Interface Alliance's Fall meeting.

Robert Nalesnik, vice president of marketing at inSilicon, said the new architecture, called TymeWare VCI, largely came about through Phoenix's close participation in the VSIA's On-chip bus development working group.

TymeWare VCI incorporates the VSIA's V irtual Component Interface (VCI) to interconnect inSilicon's cores and create an I/O subsystem for a system on chip design.

The inSilicon cores are connected via VCI to DMA blocks, which are connected via VCI to a SmartBridge, which in turn is connected via VCI to the system bus.

Instead of taking a multi-channel DMA approach in which several cores are connected to a system bus via a multi-channel DMA, Nalesnik said TymeWare VCI uses a "distributed DMA" approach in which each core has a dedicated single-channel DMA. Doing so, according to Nalesnik, makes the register set between the DMA and software identical.

"From the software side you can read and write a set of registers in a common fashion," Nalesnik said. "With that common register interface you can reduce the driver porting effort across the different protocols. One customer, for example, did it for Ethernet and it took only about 20 percent of the effort to port that to PCI. Using the old way you would have had to create the PCI register set from scratch."

Nalesnik said the DMA uses a VCI in and a VCI out, which makes it plug-and-play. The one drawback is that using the distributed DMA approach takes up approximately 700 more gates per core than the custom approach. "The time savings far outweighs the extra gates used," Nalesnik said.

In the inSilicon scheme of things, the distributed DMA blocks are then connected to the system bus via the company's SmartBridge technology, which also uses VCI. The SmartBridge eliminates the need for users to build a custom bridge for every system bus interface. The company calls this "bus agnostic." The company is initially providing interfaces to ARM ASB and AHB system buses, but it will also support MIPS, PowerPC, Hitachi SH and others, Nalesnik said.

The TymeWare VCI system currently supports VCI standard and the p-VCI peripheral bus extensions, which allows the company to plug cores into a system bus via a peripheral bus. Nalesnik said the architecture would also support the b-VCI system bus definition, which supports 64-bit data transfer, as it is released by the VSIA. The b-VCI promises to allow companies to plug higher performance cores, such as PCI-X, directly into the system bus.

InSilicon currently offers test drives of its USB and PCI cores. The complete TymeWare VCI will be released next month.

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