Open-Silicon, Inc. Announces Corporate Expansion in Response to Rapid Business Growth
MILPITAS, CA -- Jul 29, 2008
-- Open-Silicon, Inc., the leading fabless ASIC company providing the most reliable, predictable and cost-effective alternative to traditional chip design and supply chain models, today announced the hiring of four key personnel. Joining Open-Silicon are William J. DeWilkins, director of test, Al Di Cicco, senior director of sales, Cyrus Fathi, director of quality and reliability, and Robert Fulton, senior staff IP applications engineer.
"We've built our leadership by delivering successful, efficient, cost effective ASIC designs on time and based on an open model," said Dr. Naveed Sherwani, CEO and president of Open-Silicon. "Our ongoing growth and success is a testament to our technical expertise and patents in both front and back end design. These new hires support our commitment to technical leadership."
DeWilkins has been involved in managing global test engineering teams for over 15 years, defining and implementing technical support and customer training. DeWilkins managed his own test consulting firm and held positions with Agilent, National Semiconductor, and others. This included coordination and management of the customer facing account teams.
Di Cicco brings 25 years experience in ASICs, ASSPs and subsystem sales, with a strong focus in storage. He has held senior sales management and business development positions at Agere Systems, LSI, and most recently PMC-Sierra. Di Cicco has worked with a majority of the storage semiconductor industry leaders, focused on Fibre Channel, SAS, SATA and Infiniband platform development.
Fathi has a strong technical background spanning 19 years in Operations, Product & Test Engineering. He has worked on a number of cutting-edge products, from high-volume, low-margin memory chips and modules, to highly complex SOC chips implementing a variety of technologies, including non-volatile and volatile memories and high-speed microprocessors. Fathi has held positions at Altierre Corp, Raza Microelectronics, Alliance Semiconductor, and Altera Corp.
Fulton is well known for his work on SerDes and brings 26 years of technology expertise to the Open-Silicon team. He has an in-depth knowledge of and experience in data communications, digital/analog electronic design, embedded processor hardware and software, high-speed serial technologies and a number of standards and protocols. Fulton has held positions with leading semiconductor companies such as AT&T, Lucent Microelectronics, Agere Systems, LSI Corp, Global Village Communication Inc. and US Robotics.
About Open-Silicon, Inc.
Open-Silicon, Inc. is a fabless ASIC company that was founded to set new standards for the predictability, reliability and cost-effectiveness of ASICs and enable our customers to differentiate their products with custom silicon. Through our "Science of ASICs" initiative we continue to introduce technology advantages that help our customers increase their chance for success in the market. For more information, visit Open-Silicon's website at www.open-silicon.com or call 408-240-5700.
Related Semiconductor IP
- 5G-NTN Modem IP for Satellite User Terminals
- 5G-Advanced Modem IP for Edge and IoT Applications
- TSN Ethernet Endpoint Controller 10Gbps
- 13ns High-Speed Comparator with no Hysteresis
- Frequency Divider
Related News
- Silicon Creations Awarded TSMC's 2024 Open Innovation Platform Partner of the Year for Mixed Signal IP
- lowRISC: A Decade of Bringing Open Silicon to Reality
- Ainekko Merges with Veevx, Expands Open Silicon Platform with Breakthrough Memory and Embedded AI Capabilities
- Andes Technology Features 32-bit A25MP and 64-bit AX25MP RISC-V Multicore Processors With Andes Custom Extension at TSMC 2019 Open Innovation Platform Ecosystem Forum
Latest News
- IAR accelerates SDV development with Infineon DRIVECORE bundles and AURIX™ RISC-V Debug capabilities
- Ceva Launches PentaG-NTN™ 5G Advanced Modem IP, Enabling Satellite-Native Innovators to Rapidly Deploy Differentiated LEO User Terminals
- Faraday Broadens IP Offerings on UMC’s 14nm Process for Edge AI and Consumer Markets
- Accellera Approves Clock and Reset Domain Crossing (CDC/RDC) Standard 1.0 for Release
- Jmem Tek Joins the Intel Foundry Accelerator Ecosystem Alliance Program, Enabling JPUF and Post-Quantum Security Designs