NSITEXE Achieves First-Pass Silicon Success for High-Performance Data Flow Processor-based SoC Test Chip Using DesignWare IP
Silicon-Proven DesignWare Interface and Foundation IP Portfolios Lower Integration Risk and Accelerate Time to Market for Automotive Application
MOUNTAIN VIEW, Calif., Oct 28, 2019 - Synopsys, Inc. (Nasdaq: SNPS) today announced that NSITEXE, a Denso Group Company, achieved first-pass silicon success for its high-performance Data Flow Processor (DFP)-based SoC test chip using Synopsys' DesignWare® Interface and Foundation IP portfolios. With Synopsys' silicon-proven DesignWare IP, NSITEXE met the advanced functionality, processing, performance, and testability requirements of its DFP-based SoC. NSITEXE's DFP-based SoC combines both a CPU and a GPU to process large and complex datasets for parallel data management with power-efficient parallelism and quality.
"To implement state-of-the-art capabilities in our SoC, we needed a broad range of IP that met our aggressive power, performance, and area requirements," said Hideki Sugimoto, chief technology officer at NSITEXE. "After evaluating Synopsys' comprehensive portfolio of interface IP, we were confident that with Synopsys' high-quality DesignWare IP we are able to accelerate our project schedule and achieve first-pass silicon success."
Synopsys' silicon-proven DesignWare IP for PCI Express 3.0 delivers low latency and high performance for efficient system throughput in advanced designs. The robust architecture of the DesignWare LPDDR4 IP enables fast access to the DRAM with high data bandwidth and low power. The DesignWare Embedded Memories and Logic Libraries deliver the industry's only foundation IP solution to offer options for high-temperature process, voltage, and temperature (PVT) corners, enabling designers to achieve the best combination of performance, power, and area. For comprehensive test coverage, Synopsys' STAR Hierarchical System and STAR Memory System initialize the LPDDR PHY and perform high-quality user-programmable tests on the external memory and interconnect. The STAR Hierarchical System's Measurement Unit performs accurate on-chip characterization for critical phase-locked-loop (PLL) clock measurement without the need for additional fractional PLLs or high-frequency clock sources.
"SoCs for advanced applications are growing in complexity and require a range of IP to implement the necessary functionality," said John Koeter, vice president of marketing for IP at Synopsys. "By providing the industry's broadest IP portfolio, Synopsys is enabling innovative companies like NSITEXE to meet their advanced design needs, while accelerating the development of their automotive SoCs."
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits, and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support, and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit www.synopsys.com/designware.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.
Related Semiconductor IP
- Root of Trust (RoT)
- Fixed Point Doppler Channel IP core
- Multi-protocol wireless plaform integrating Bluetooth Dual Mode, IEEE 802.15.4 (for Thread, Zigbee and Matter)
- Polyphase Video Scaler
- Compact, low-power, 8bit ADC on GF 22nm FDX
Related News
- Synopsys Enables First-Pass Silicon Success of High Performance NSITEXE Data Flow Processor-based SoC Test Chip for Autonomous Driving
- Chip Interfaces Successfully Completes Interlaken IP Interoperability Test with Cadence 112G Long-Reach PHY
- Synopsys' DesignWare STAR Memory System's New Test and Repair Capabilities Speed Embedded Memory Repair Time by 10x
- Synopsys Enhances DesignWare Memory Test and Repair Solution for Embedded MRAM
Latest News
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Arm Announces Appointment of Eric Hayes as Executive Vice President, Operations