Neuromorphic Device with Low Power Consumption
By Maurizio Di Paolo Emilio, EETimes (August 1, 2022)
Compact, low–latency, and low–power computer systems are required for real–world sensory–processing applications. Hybrid memristive CMOS neuromorphic architectures, with their in–memory event–driven computing capabilities, present an appropriate hardware substrate for such tasks.
To demonstrate the full potential of such systems and drawing inspiration from the barn owl’s neuroanatomy, CEA–Leti has developed an event–driven, object–localization system that couples state–of–the–art piezoelectric, ultrasound transducer sensors with a neuromorphic computational map based on resistive random–access memory (RRAM).
CEA–Leti built and tested this object tracking system with the help of researchers from CEA–List, the University of Zurich, the University of Tours, and the University of Udine.
The researchers conducted measurements findings from a system built out of RRAM–based coincidence detectors, delay–line circuits, and a fully customized ultrasonic sensor. This experimental data has been used to calibrate the system–level models. These simulations have then been used to determine the object localization model’s angular resolution and energy efficiency. Presented in a paper published recently in Nature Communications, the research team describes the development of an auditory–processing system that increases energy efficiency by up to five orders of magnitude compared with conventional localization systems based on microcontrollers.
To read the full article, click here
Related Semiconductor IP
- Sine Wave Frequency Generator
- CAN XL Verification IP
- Rad-Hard GPIO, ODIO & LVDS in SkyWater 90nm
- 1.22V/1uA Reference voltage and current source
- 1.2V SLVS Transceiver in UMC 110nm
Related News
- Lattice Expands Low Power, Small FPGA Portfolio with High I/O Density and Secure Device Options
- IntoPIX Accelerates Automotive Innovation With TicoRAW & JPEG XS On Lattice Low Power FPGAs
- Gowin Semiconductor Takes Leadership Position in Always-on Low Power FPGAs with GW1NZ-ZV Device Production
- Spectral Design & Test Inc. Announces 3rd Generation 45RFSOI Low Power SRAM Targeted at the 5G Mobile Device SoC Market
Latest News
- Electronics Monitoring Leader proteanTecs Raises $51M in Series D Funding
- Jmem Tek has achieved NIST CAVP certification, with ASCON algorithm implementation, and will be showcased at SEMICON Taiwan.
- Cadence Expands Digital Twin Platform Library with NVIDIA DGX SuperPOD Model to Accelerate AI Data Center Deployment and Operations
- eMemory’s subsidiary, PUFsecurity, and Carota Form Strategic Alliance to Secure OTA Updates for the Software-Defined Era
- Intel Announces Key Leadership Appointments to Accelerate Innovation and Strengthen Execution