Mosis offers IBM 90-nm process on MPW
Peter Clarke, EE Times
(05/09/2006 3:13 PM EDT)
MUNICH, Germany
(05/09/2006 3:13 PM EDT)
MUNICH, Germany
— The Mosis integrated circuit fabrication service has begun offering multi-project wafer (MPW) runs on 90-nanometer process technologies from IBM, according to Paul Double, managing director of EDA Solutions Ltd.
EDA Solutions (Southampton, England) is the representative of Mosis in Europe.
The process is the 9SF process, which comes in three variants, low power digital, standard digital and analog and RF, said Double. The first customer submission deadline is Dec. 4, 2006, according to the Mosis website.
To read the full article, click here
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Dolphin Integration first to achieve 0.84 pA per bit in SpRAM at the 90 nm uLL embedded flash process
- Dolphin Integration announces the availability of the new generation of SpRAM generator at 90 nm and 55 nm eFlash
- Mikron Licenses Cadence Physical Verification System and QRC Extraction Solutions for 90 nm IC Design Flow
- Dolphin Integration announce the availability of the TSMC sponsored sROMet and DpRAM generators at 90 nm LP eFlash
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack