Moortec To Showcase Its PVT Monitoring IP At the TSMC China OIP Ecosystem Forum in Nanjing
October 29, 2018 -- Moortec will be showcasing its range of PVT Monitoring Subsystem Solutions supporting advanced node processes at the TSMC China OIP Ecosystem Forum which is taking place at the Fairmont hotel in Nanjing on Tuesday 30th of October.
Moortec provide market leading high accuracy, highly featured PVT Subsystem IP for Process, Voltage & Temperature (PVT) monitoring, targeting advanced node CMOS technologies on 40nm, 28nm, 16nm, 12nm and 7nm. The Moortec Subsystem provides ASIC designers solutions for thermal management, detection of supply anomalies and the identification of process corners.
At the TSMC China OIP Ecosystem Forum, Moortec will be exhibiting its range of ‘off the shelf’ silicon proven, monitoring IP solutions which are used for monitoring and controlling conditions on-chip for performance optimisation and reliability purposes.
Moortec monitoring IP is used by a wide range of customers worldwide. The use of third-party silicon proven IP on advanced is growing and as an IP Vendor Moortec are proud to have built long term customer relationships based on excellent products in terms of quality and reliability but also outstanding service, support and results.
Of particular relevance at the OIP event will be the focus on particular applications such as AI, Automotive, SSD Controllers and Crypto Currency Mining. As a company Moortec are committed to expanding our advanced node in-chip monitoring portfolio while maintaining our focus as the leading PVT provider.
TSMC China OIP Ecosystem Forum delegates can discuss their PVT requirements with the Moortec team at the booth #21.
About Moortec
Moortec provides compelling embedded subsystem IP solutions for Process, Voltage & Temperature (PVT) monitoring, targeting advanced node CMOS technologies on 40nm, 28nm, 16nm, 12nm and 7nm. Moortec’s in-chip sensing solutions support the semiconductor design community’s demands for increased device reliability and enhanced performance optimization, enabling schemes such as DVFS, AVS and power management control systems. Moortec provides excellent support for IP application, integration and device test during production. Moortec’s high-performance analog and mixed-signal IP designs are delivered to ASIC and System on Chip (SoC) technologies within the Datacentre, Consumer, Automotive and IoT sectors.
If you would like to arrange a meeting at the event please contact Ramsay Allen on +44 1752 875133 or email: ramsay.allen@moortec.com
For more information please visit www.moortec.com
Related Semiconductor IP
- In-Chip Monitoring Subsystem for Process, Voltage & Temperature (PVT) Monitoring, TSMC N3E
- PVT Controller (Series 5) (Sub-system for complete PVT monitoring), TSMC N3E
- In-Chip Monitoring Subsystem for Process, Voltage & Temperature (PVT) Monitoring, TSMC N4P
- PVT Controller (Series 5) (Sub-system for complete PVT monitoring), TSMC N4P
- In-Chip Monitoring Subsystem for Process, Voltage & Temperature (PVT) Monitoring, TSMC N3
Related News
- Moortec to showcase its advances in PVT in-chip monitoring for 40nm, 28nm, 16nm, 12nm and 7nm at ICCAD in Zhuhai China
- Moortec to Showcase its PVT Monitoring IP at TSMC China Technology Symposium
- The Growing Need for On-Chip PVT Die Monitoring Solutions
- Moortec to exhibit their embedded In-Chip Monitoring Subsystem IP at the 2017 TSMC OIP Ecosystem Forum in Santa Clara
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