Mobile Semiconductor Introduces A New 55nm High Density Memory Compiler Especially Designed For IoT Devices
SEATTLE -- February 4, 2019 -- Today, Mobile Semiconductor announced a new 55nm HD (High Density) memory compiler targeted at the cost sensitive IoT market. The new memory compiler boasts one of the highest density footprints in the industry dramatically reducing the die area and reducing customer product costs for sensors, smart locks, trackers and smart light bulbs.
Cameron Fisher, CEO and Founder of Mobile Semiconductor, said, "We believe that our success in the current 55nm Memory Compilers sets us apart from competitive offerings. This new high-density product is well positioned to support our customer's IoT products as they grow in features and capabilities. Our goal is to ensure that our customers can meet and exceed their silicon area goals and therefore reduce their costs."
Key features include:
- 15% to 33% smaller than previous 55nm compilers
- At least 11% smaller than competitive solutions
- Built on Mobile Semi's volume designs at 55nm and 65nm
- Available off the shelf today
Fisher continued, "Mobile Semiconductor remains the leader in providing memory compliers that target the needs of specific industries. We are proud of the fact that repeat customer purchases are close to 100%. This includes customers moving to the next smaller node or building new products on the same node. Reducing the memory size offered by this new 55nm memory compiler gives our customers a compelling reason to choose Mobile Semiconductor for their cost sensitive IoT products."
The 55nm HD memory compiler takes advantage of industry standard Bitcells provided by the top foundries. All Mobile Semiconductor memory compilers are supported by a wide range of industry leading licensing options. Contact Mobile Semiconductor at info@mobile-semi.com with your specific product needs.
About Mobile Semiconductor:
Mobile Semiconductor develops SRAM, ROM and Register File Memory compilers optimized for applications requiring ultra-low power, low leakage or ultra-high performance.
100% of Mobile Semiconductor's design and support takes place inside the United States and the tools have zero open source software. Their customers include aerospace giants, medical device manufacturers, key semiconductor companies, and foundries supporting their customers.
Cameron Fisher has served as CEO of Mobile Semiconductor since co-founding the company in 2006. Prior to founding Mobile Semiconductor, Mr. Fisher served as the Director of the Low Power SRAM Design Group at Virage Logic Corporation in Seattle, Washington where he patented several low power design innovations.
Related Semiconductor IP
- 5G-NTN Modem IP for Satellite User Terminals
- 400G UDP/IP Hardware Protocol Stack
- AXI-S Protocol Layer for UCIe
- HBM4E Controller IP
- 14-bit 12.5MSPS SAR ADC - Tower 65nm
Related News
- RAAAM Memory Technologies and NXP Semiconductors Announce Collaboration to Implement High Density On-Chip Memory
- Lattice Expands Low Power, Small FPGA Portfolio with High I/O Density and Secure Device Options
- NEO Semiconductor Introduces World’s First Extreme High Bandwidth Memory (X-HBM) Architecture for AI Chips
- Renesas Develops 3nm TCAM Technology Combining High Memory Density and Low Power, Suitable for Automotive SoCs
Latest News
- GlobalFoundries Announces Availability of AutoPro 150 eMRAM Technology on Enhanced FDX Platform for Advanced Automotive Applications
- MIPS and INOVA Collaborate to put Physical AI into the palm of Robotic hands with new Reference Platform
- Allegro DVT Launches DWP300 DeWarp Semiconductor IP
- Ubitium Tapes Out Universal Processor to End Embedded Computing Complexity Crisis
- Movellus Advanced Clocking IP Selected for QuickLogic’s Strategic Radiation Hardened FPGA Program