New Analog FastSPICE eXTreme technology boosts verification performance by up to 10X
Innovative functionality available with Mentor’s Analog FastSPICE platform can dramatically accelerate nanometer-scale verification of large, post-layout analog designs
July 20, 2020 -- Mentor, a Siemens business, today announced significant advances in the Analog FastSPICE Platform with the introduction of Analog FastSPICE eXTreme technology for nanometer-scale verification of large, post-layout analog designs. Analog FastSPICE eXTreme includes revolutionary technology that can substantially boost simulation performance, while helping maintain the foundry-certified accuracy required for nanometer-scale analog verification.
Analog FastSPICE eXTreme is especially valuable for analog designs containing high levels of parasitic complexity and contact resistance, both of which grow increasingly problematic as process geometries continue to shrink. Initial customer benchmarks show a simulation performance boost of 10X compared to Mentor’s previous-generation Analog FastSPICE offering, and a 3X simulation performance acceleration compared to commercially available solutions at similar accuracy settings.
“As a provider of world-class silicon intellectual property for high-performance clocking such as PLLs, and low-power/high-speed data interfaces such as SerDes, our designs are included in the most advanced systems-on-chip and therefore must target the latest FinFET geometries down to 3nm. Therefore, it is imperative we are able to simulate FinFET designs quickly and accurately to meet our aggressive schedules,” said Randy Caplan, executive vice president for Silicon Creations. “We participated in the early access program for the Analog FastSPICE eXTreme technology using several large post-layout designs, and have seen up to 10X speed-up while maintaining SPICE-level accuracy. We look forward to using Analog FastSPICE eXTreme to verify our fully extracted designs, enabling first silicon success by achieving our performance and high yield targets.”
Mentor’s Analog FastSPICE Platform provides rapid circuit verification for nanometer analog, radio frequency (RF), mixed-signal, memory, and custom digital circuits. Foundry certified to 5nm and essential to the design of many of the most successful analog integrated circuits (ICs) in the world, the platform delivers nanometer-scale SPICE accuracy two times faster than parallel SPICE simulators.
Available to current Analog FastSPICE customers at no additional cost, the new Analog FastSPICE eXTreme technology is designed to deliver additional performance benefits for large, post-layout analog designs. Analog FastSPICE eXTreme features innovative resistor-capacitor (RC) circuit reduction algorithms, significant performance improvements to the Analog FastSPICE core SPICE matrix solver, and comprehensive, full-spectrum device noise analysis capabilities designed to enable silicon-accurate simulation.
“Analog Bits is the leading provider of a broad portfolio of mixed-signal IP such as low-power SerDes, phase-locked loops, sensors and I/O’s in advanced FinFET processes down to 3nm. We have had a long-standing relationship with Mentor and the Analog FastSPICE Platform, and have participated in the AFS eXTreme early access program,” said Mahesh Tirupattur, executive vice president for Analog Bits. “We have stringent accuracy requirements for our low-power integrated clocking and interconnect IP technology that demand inclusion of post-layout parasitics for FinFET designs to more accurately represent the true analog circuit response. Analog FastSPICE eXTreme technology provides 6X performance improvement while maintaining SPICE accuracy for nanometer analog verification. Mentor and Analog FastSPICE continue to deliver the innovative SPICE technology that we need for designs of today and in the future.”
Analog FastSPICE eXTreme complements Mentor’s Symphony Mixed-Signal Platform, which leverages the Analog FastSPICE circuit simulator and offers fast and accurate mixed-signal verification with industry-standard HDL simulators. The Symphony platform supports verification of complex, nanometer-scale mixed-signal ICs with an intuitive use model, powerful debugging capabilities and configuration support.
“As analog, mixed-signal, and RF designs continue to advance into deep nanometer nodes, designers worldwide are demanding that circuit simulation performance improves significantly without compromising accuracy in the advanced nodes," said Ravi Subramanian, Ph.D., senior vice president, IC Verification Solutions for Mentor. “Our circuit simulation R&D team has been continuously innovating as we tackle every new challenge at advanced nodes, and we are delighted to introduce Analog FastSPICE eXTreme as the next big chapter in our evolution.”
Mentor’s current Analog FastSPICE customers can access Analog FastSPICE eXTreme at no additional cost. For more information about the Analog FastSPICE Platform, please visit: https://bit.ly/2ZApnyx.
About Mentor Graphics
Mentor Graphics Corporation, a Siemens business, is a world leader in electronic hardware and software design solutions, providing products, consulting services, and award-winning support for the world’s most successful electronic, semiconductor, and systems companies. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. Web site: http://www.mentor.com.
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- Siemens' Analog FastSPICE certified for UMC's 28nm HPCᵁ+ process technology
- Siemens collaborates with GlobalFoundries to certify Analog FastSPICE for the foundry's high-performance processes
- Lattice Semiconductor Provides FPSC Device to Extreme Networks to Enable 10-Gigabit Ethernet on the BlackDiamond Core Switch
- Synplicity Unveils Synplify DSP For FPGA-Based DSP Design System Level Optimizations Automate Extreme DSP Performance
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack