Maven Silicon is now an Approved Training Partner of Altera’s Solution Acceleration Partner (ASAP) Program
June 25, 2025 -- Maven Silicon is now an Approved Training Partner of Altera’s Solution Acceleration Partner (ASAP) Program.
Through this powerful collaboration, our learners will gain hands-on experience with Altera’s FPGAs, cutting-edge tools, and hardware platforms—equipping them to design advanced RISC-V Chips and RISC-V software applications using Altera FPGAs and Boards.
Now, Maven Silicon, as an Approved Partner of ASAP, upskills all our NCG trainees with RISC-V and Altera-FPGA expertise for their industry-ready careers in VLSI and embedded systems.
We’re equally proud to support RISC-V International and Altera by delivering high-quality training and enabling faster adoption of their technologies.
RISC-V + Altera + Maven Silicon = Empowering the Next Generation of Chip Designers!
Related Semiconductor IP
- Network-on-Chip (NoC)
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- UCIe PHY (Die-to-Die) IP
- UCIe-S 64GT/s PHY IP
- UA Link DL IP core
Related News
- ARM Announces New Approved Training Centers In Asia Pacific
- ARM Approved Training Center Opens In Seoul
- ARM Continues Expansion Into China With The Addition Of Two Approved Training Centers
- Nanjing Prochip Becomes ARM Approved Training Center for SoC Designers in China
Latest News
- GUC Monthly Sales Report – November 2025
- Global Semiconductor Sales Increase 4.7% Month-to-Month in October
- CXL Adds Port Bundling to Quench AI Thirst
- Tenstorrent and AutoCore Announce Strategic Partnership to Power High-Performance RISC-V Automotive Computing with AutoCore.OS
- Tenstorrent Announces Availability of TT-Ascalon™