Khronos Releases SPIR 2.0 Provisional Specification
Open, cross-platform intermediate representation standard for heterogeneous computing now supports portable encoding of OpenCL 2.0 device programs
August 11th, 2014, Vancouver, SIGGRAPH – The Khronos™ Group today announced the ratification and public release of the SPIR™ 2.0 provisional specification that provides a non-source encoding, and binary level portability, for OpenCL™ 2.0 device programs. SPIR (Standard Portable Intermediate Representation) is the industry's first open, cross-platform Intermediate Representation standard for portable heterogeneous parallel computing and is based on LLVM IR. SPIR enables developers to avoid exposing sensitive kernel source and enables a diversity of language front-ends to easily target OpenCL platforms and devices in addition to OpenCL C. The SPIR specification and registry online.
Before the development of SPIR, new tools and languages for accessing parallel acceleration on heterogeneous systems required specific and detailed knowledge to create compiler back-ends for each vendor's unique hardware architecture. The SPIR standard enables vendors to accept and accelerate SPIR binaries on their hardware, freeing higher-level languages to innovate across a diverse range of platforms including discrete accelerator boards, system on chips, graphics processors and FPGAs. For example, the developers of OpenACC, C++ AMP and Python are targeting SPIR to access optimized back-ends across multiple vendors
SPIR enables a rich ecosystem of compiler middleware for portable parallel programs by building on the strengths of LLVM and OpenCL. SPIR 2.0 is a specialization of LLVM 3.4 IR, but also encodes OpenCL-specific semantics. The cl_khr_spir standard extension to OpenCL 1.2 and 2.0 defines how to load a SPIR instance into an OpenCL runtime. The development of SPIR has been validated on multiple vendor implementations of OpenCL, and has benefited from a thorough open consultation process between Khronos and the LLVM and Clang communities.
The SPIR 2.0 provisional has been released to enable the growing community of OpenCL developers to provide feedback before the specification is finalized. Comments are welcome at the Khronos forum here.
In OpenCL 2.0, host and device kernels can directly share complex, pointer-containing data structures such as trees and linked lists, providing significant programming flexibility and eliminating costly data transfers between host and devices. SPIR 2.0 includes new functionality to fully support new features released in OpenCL C 2.0, including:
- Generic address space – where functions can be written without specifying a named address space for arguments, especially useful for those arguments that are declared to be a pointer to a type, eliminating the need for multiple functions to be written for each named address space used in an application;
- Device side kernel enqueue – where device kernels can enqueue kernels to the same device with no host interaction, enabling flexible work scheduling paradigms and avoiding the need to transfer execution control and data between the device and host, often significantly offloading host processor bottlenecks;
- C++11 atomics – a subset of C11 atomics and synchronization operations to enable assignments in one work-item to be visible to other work-items in a work-group, across work-groups executing on a device or for sharing data between the OpenCL device and host;
- Pipes - memory objects that store data organized as a FIFO. OpenCL 2.0 provides built-in functions for kernels to read from or write to a pipe, providing straightforward programming of pipe data structures that can be highly optimized by OpenCL implementers.
“AMD continues to support industry standards such as OpenCL and SPIR, which we believe is the right approach for unleashing the full potential of heterogeneous computing,” said Manju Hegde, corporate vice president, Heterogeneous Applications and Developer Solutions, AMD. ”We are excited to see SPIR continuing to evolve to support OpenCL 2.0 and provide an improved platform for other heterogeneous language innovation. SPIR 2.0 provides the industry with a much needed standard binary format with sufficient flexibility to enable compiler and languages vendors with a common cross-platform target.”
In addition to the SPIR specification, Khronos is making the following open source software components available on Github under the same license as LLVM and Clang:
- a modified Clang which generates SPIR from OpenCL C kernel language device programs;
- a SPIR module verifier, written in the form of an LLVM pass;
- a SPIR built-ins name mangler, written as a standalone library and executable;
- a header file containing definitions for all enumerated values in the SPIR specification.
SPIR 1.2 uses Clang/LLVM 3.2 and SPIR 2.0 uses Clang/LLVM 3.4.
Further details on these resources can be found on the Khronos Group github.
OpenCL BOF at SIGGRAPH 2014
Attendees at the SIGGRAPH 2014 Conference in Vancouver are invited to the Khronos OpenCL BOF at 3-4PM on Wednesday 13th at the Marriott Pinnacle Hotel, next to the Vancouver Convention & Exhibition Centre to hear more details around developments in the OpenCL ecosystem. Space is limited and is available on a first-come first served basis. Full details of this and other Khronos developer sessions @ SIGGRAPH are available online.
About The Khronos Group
The Khronos Group is an industry consortium creating open standards to enable the authoring and acceleration of parallel computing, graphics, vision, sensor processing and dynamic media on a wide variety of platforms and devices. Khronos standards include OpenGL®, OpenGL® ES, WebGL™, OpenCL™, SPIR™, SYCL™, WebCL™, OpenVX™, OpenMAX™, OpenVG™, OpenSL ES™, StreamInput™, COLLADA™ and glTF™. All Khronos members are enabled to contribute to the development of Khronos specifications, are empowered to vote at various stages before public deployment, and are able to accelerate the delivery of their cutting-edge media platforms and applications through early access to specification drafts and conformance tests. More information is available at www.khronos.org.
Related Semiconductor IP
- RISC-V CPU IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
Related News
- Khronos Releases OpenCL 2.1 Provisional Specification for Public Review
- Khronos Releases OpenVX 1.0 Specification for Computer Vision Acceleration
- Khronos Releases OpenGL ES 3.1 Specification
- Khronos Finalizes and Releases OpenVX 1.0 Specification for Computer Vision Acceleration
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers