Intel to Accelerate Altera, Says CEO
Krzanich: ARM cores, long lead times OK
EE Times
8/18/2016 05:20 PM EDT
SAN FRANCISCO – Intel’s chief executive pledged to support of the former Altera’s base business including use of ARM cores and long product lead times at the first event of the merged x86 and FPGA makers. In a Q&A session he also provided some insights on the company’s acceleration strategy in light of its recent acquisition of startup Nervana.
“More than 50% of value if the [$16 billion Altera] acquisition was actually tied to growing Altera at a faster rate than it was growing,” said Brian Krzanich in the first ISDF event here.
As an example, Krzanich pledged to ship before the end of the year Altera’s flagship, the Stratix 10 FPGAs. It will wear the Intel brand and use both Intel’s 14nm process technology and be the first chip to use its embedded multi-die interconnect packaging technology.
To read the full article, click here
Related Semiconductor IP
- Video Tracking FPGA IP core for Xilinx and Altera
- Video Tracking FPGA IP core for Xilinx and Altera
- Video Tracking FPGA IP core for Xilinx and Altera
- SATA Host on Altera Arria II GX
- SATA Device Controller on Altera Arria II GX
Related News
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
- Cadence Joins Intel Foundry Services USMAG Alliance to Accelerate Chip Design Development
- Lorentz Solution Joins Intel Foundry Services (IFS) Accelerator EDA Alliance Program to Enable Peakview EM Platform and Accelerate IC and 3DIC Designs
- Synopsys and Intel Foundry Accelerate Advanced Chip Designs with Synopsys IP and Certified EDA Flows for Intel 18A Process
Latest News
- Jim Keller: ‘Whatever Nvidia Does, We’ll Do The Opposite’
- FlexGen Streamlines NoC Design as AI Demands Grow
- IntoPIX Presents Its New Titanium Software Suite: Empowering AV-Over-IP Workflows With Speed, Quality & Interoperability
- Global Semiconductor Sales Increase 2.5% Month-to-Month in April
- Speedata Raises $44M to Launch First-Ever Chip Designed Specifically for Accelerating Big Data Analytics - Compute's Second Largest Workload