Aurora-like 8b/10b @3Gbps for ALTERA Devices
Overview
REFLEX CES introduces the industry’s first release of its Aurora-‐like IP Core based on ALTERA FPGA enabling interoperability between VIRTEX 6 LXT XILINX and STRATIX IV GX and STRATIX V GX ALTERA FPGA.
Key Features
- Up to 3.125Gbps bit rate per lane
- Configurable up to 16 transceivers lanes
- 8B/10B encoding
- Native flow control with immediate and completion mode
- User flow control
- Additional modules to convert interfaces to and from AXI streaming
- Full-duplex operation
- Framing interface for user data
- Clock compensation sequence generation
- Per lane polarity inversion
- Skew compensation
Block Diagram
Deliverables
- REFLEX CES delivers a cost-‐effective solution for each customer project based-‐on an adapted license fee with the following deliveries:
- VHDL source code or encrypted licenses
- User guide
- Reference Design for ALTERA and XILINX development boards.
Technical Specifications
Availability
Now