Few Surprises as Intel, GloFo Detail Process Technologies
Dylan McGrath, EETimes
12/7/2017 02:01 AM EST
SAN FRANCISCO — Intel detailed plans to use cobalt for some interconnect layers at 10nm, while Globalfoundries offered specifics on how it will utilize extreme ultraviolet (EUV) lithography for the first time at the 7nm node in dueling process technology presentations at one of the most hotly anticipated sessions at the IEEE International Electron Device Meeting (IEDM) here.
Intel will use cobalt in on the bottom two layers of its 10nm interconnect to get a five to 10 fold improvement in electromigration and a two-fold reduction in via resistance. It represents the first time a chip maker has detailed plans to introduce cobalt — a brittle metal long considered a promising dielectric candidate — in a process, according to G. Dan Hutecheson, chairman and CEO of VLSI Research.
To read the full article, click here
Related Semiconductor IP
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
- HiFi iQ DSP
- CXL 4 Verification IP
- JESD204E Controller IP
Related News
- Synopsys Delivers Certified EDA Flows and High-Quality IP for Intel 16 Process
- Siemens' Calibre platform now certified for IFS' Intel 16 process technology
- Cadence Digital, Custom/Analog Design Flows Certified and Design IP Available for Intel 16 FinFET Process
- Intel and Synopsys Expand Partnership to Enable Leading IP on Intel Advanced Process Nodes
Latest News
- RaiderChip showcases the evolution of its local Generative AI processor at ISE 2026
- ChipAgents Raises $74M to Scale an Agentic AI Platform to Accelerate Chip Design
- Avery Dennison announces first-to-market integration of Pragmatic Semiconductor’s chip on a mass scale
- Ceva, Inc. Announces Fourth Quarter and Full Year 2025 Financial Results
- Ceva Highlights Breakthrough Year for AI Licensing and Physical AI Adoption in 2025