Hitachi, STMicro to develop 64-bit RISC for consumer apps

Hitachi, STMicro to develop 64-bit RISC for consumer apps

EETimes

Hitachi, STMicro to develop 64-bit RISC for consumer apps
By the SBN news staff, Semiconductor Business News
October 12, 2000 (4:31 p.m. EST)
URL: http://www.eetimes.com/story/OEG20001012S0029

SAN JOSE, Calif. — Hitachi Ltd. and STMicroelectronics this week announced plans to extend their partnership in RISC processor development to next-generation 64-bit architectures for multimedia and Internet appliances for consumers. The two companies said they will aim the SH-6 and SH-7 architectures at applications in digital video cameras, video telephones, home networking Internet appliances and digital televisions as well as other consumer products.

Hitachi of Japan and Europe's STMicroelectronics formed an alliance last year to develop embedded processors based on Hitachi's SH-5 RISC architecture. The first products using that architecture have been released for production, and they are expected to be sampled by the end of this year.

During the Microprocessor Forum in San Jose on Wednesday (Oct. 11), the two companies announced plans to create upward-compatible SH-6 and SH-7 architectures, leveraging from their work on the SH-5. H itachi's embedded products will be called the SH-6 and SH-7 series, while STMicroelectronics will designate its products as the ST60 and ST70 families.

"Combining Hitachi's RISC technology with ST's successful consumer technology will definitely continue to create new generations of SuperH architectures," said Kunio Hasegawa, executive vice president of Hitachi's Semiconductor and Integrated Circuits group. "In the growing age of personal information electronics, this collaboration will provide more flexibility, more performance and less cost for customers."

Hitachi and STMicroelectronics said their expanded partnership will enable them to speed development of new high-performance, low-cost processors for consumer multimedia systems.

The SH-6 will be developed to operate up to 1 GHz and deliver over 2 billion instructions per second, said the two companies. The SH-6 architecture will include micro-architecture enhancements from the SH-5 processor for more advanced interactive networking applicati ons. The SH-6 is expected to be available in second half 2002.

The SH-7 architecture will expand on the SH-6 to provide more advanced processing performance for multimedia applications, said Hitachi and STMicroelectronics. Features of the SH-7 will determined after the SH-6 is more fully developed and the market more defined in the next few years, according to the two partners.

The co-developed SuperH central processing units are key building blocks in STMicroelectronics' system-on-chip strategy for digital consumer applications, said Philippe Geyres, corporate vice president and general manager of the company's Consumer and Microcontroller Groups. "Co-development allows ST to optimize the CPU for software porting, performance and cost while supporting a de facto standard CPU that attracts third-party software," he added.

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