Allegro DVT improves its HEVC Decoder silicon IP with 10 bit support
Grenoble, France, July 19, 2013 -- Developed to compress 4K and high resolution video contents, the next generation video standard: HEVC/H.265 brings fifty percent bitrate saving compared to content encoded with H.264/AVC.
Requirement of TV broadcasting for carrying 4K and ultra-high definition content is now driving the adoption of the HEVC (High Efficiency Video Coding) standard.
This demand for devices supporting HEVC is growing fast, and Allegro DVT is ready with the industry’s first fully compliant HEVC decoding IP that supports both Main and Main10 profiles. The Main10 profile was specifically designed to improve 4K content video quality thanks to 10 bit color depth support.
Our HEVC Decoding IP is available today, runs real-time on FPGA and can be immediately delivered to any customer wishing for 4K enabled products. We see that 4K content will drive the market of next-generation ultra HD television displays (UHDTV) and content capture systems. Our customers have an immediate requirement for HEVC into System on Chip (SoC), which we are ready to address with our HEVC Decoding IP.
One of the major innovations in the HEVC standard, is the introduction of several tools to parallelize processing, such as “dependent slices”, “tiles” and “wavefront parallel processing”. Our HEVC Decoding IP is based on a scalable and unique multi-core architecture, supporting any combination of these parallel processing tools. This unique decoder architecture removes all constraints on the encoders and ensures interoperability with all types of parallelized encoding.
The HEVC Decoding IP core is designed to be easily integrated in all next generation SoC devices requiring exceptional performance while maintaining a very low operating frequency and high level of power savings.
For information or a live demonstration of our HEVC Decoder IP, please contact us at info@allegrodvt.com.
Read more on Allegro DVT products for IC vendors
Allegro DVT is a leading provider of H.264/MPEG-4 AVC|SVC|MVC and HEVC/H.265 solutions, including industry standard compliance test suites, H.264/MPEG-4 AVC and HEVC/H.265 encoder, codec and decoder hardware (RTL) IPs; and multiscreen encoders and transcoders. Allegro DVT products have been chosen by more than 100 major IC providers, OEMs and broadcasters. For more information, visit Allegro DVT's Website Allegro DVT's Website or contact info@allegrodvt.com.
Related Semiconductor IP
- 4K, 4:2:0/4:2:2:/4:4:4, 8/10/12 bit HEVC Decoder
- H.265 HEVC Decoder
- HEVC 4Kp60 Decoder, Supports 4:2:2, 10-bit decoding and 150Mbps bitrate
Related News
- Allegro DVT annouces the World first HEVC hardware decoder IP
- Allegro DVT showcases the first HEVC video hardware decoder IP at CES 2013
- Ittiam Systems Announces Availability and Software Licensing of HEVC (H.265) Video Encoder and Decoder for Professional, Enterprise and Consumer Digital Media Markets
- Tata Elxsi unveils HEVC Ultra HD (4K) Decoder for Smartphones, Tablets, Set Top Boxes, Gaming consoles and other CE devices
Latest News
- BrainChip Provides Low-Power Neuromorphic Processing for Quantum Ventura’s Cyberthreat Intelligence Tool
- Ultra Accelerator Link Consortium (UALink) Welcomes Alibaba, Apple and Synopsys to Board of Directors
- CAST to Enter the Post-Quantum Cryptography Era with New KiviPQC-KEM IP Core
- InPsytech Announces Finalization of UCIe IP Design, Driving Breakthroughs in High-Speed Transmission Technology
- Arm Announces Appointment of Eric Hayes as Executive Vice President, Operations