Foundries should drive IP quality

Proactive collaboration among IP users, foundry and IP suppliers is at a remarkably early stage, however. Most IP is still verified as isolated blocks and does not consider chip-level interdependencies. In addition, various IP verification methodologies are just now coming into use. As a result, the potential value and productivity gains that would result from reintegrating the IC design chain are not always delivered. To address this, TSMC proposes a new model in which IP partnerships are selective and actively managed; IP uniqueness is adaptively managed; and quality is rigorously evaluated so it can be used as a primary criterion in the purchasing decision. This is best accomplished by creating a new SoC team member: the chief IP officer.

IP selection is directly related to the intended function of the target SoC. This means there will be varying degrees of integration with manufacturing processes. Often, other IP is required. The overall responsibility for ensuring IP quality thus rests with all three parties to the design effort: IP developers, device designers and foundries. While proactive management of this process is the responsibility of all parties, the foundries must serve as the main driver for this activity.

By Kurt A. Wolf, director of R&D, and Kenneth C. Weng, deputy director of library and IP quality management, Library and IP Management Division at Taiwan Semiconductor Manufacturing Co. Ltd.