Faster verification is the goal at ST
03/05/2007 9:00 AM EST, EE Times
Laurent Ducousso, who manages intellectual-property (IP) verification for STMicroelectronics' Home Entertainment Division, is a man in a hurry. He's in charge of verification for multimillion-gate systems-on-chip (SoCs) that go into consumer products, which have to ship on time. He's succeeding, thanks to a transaction-level SystemC-based approach that both speeds things up and greatly reduces the overall bug count. But debugging and software verification remain challenging. Ducousso recently talked to EE Times editor Richard Goering about ST's verification approach.
Laurent Ducousso, who manages intellectual-property (IP) verification for STMicroelectronics' Home Entertainment Division, is a man in a hurry. He's in charge of verification for multimillion-gate systems-on-chip (SoCs) that go into consumer products, which have to ship on time. He's succeeding, thanks to a transaction-level SystemC-based approach that both speeds things up and greatly reduces the overall bug count. But debugging and software verification remain challenging. Ducousso recently talked to EE Times editor Richard Goering about ST's verification approach.
To read the full article, click here
Related Semiconductor IP
- SHA-256 Secure Hash Algorithm IP Core
- EdDSA Curve25519 signature generation engine
- DeWarp IP
- 6-bit, 12 GSPS Flash ADC - GlobalFoundries 22nm
- LunaNet AFS LDPC Encoder and Decoder IP Core
Related News
- Avery Design Systems Verification IP Helps Solid State Storage Controller Startup Validate its Designs and Get to Market Faster
- INTERCHIP achieves 3x faster verification for next-gen clocking oscillator with Siemens' advanced analog and mixed-signal EDA technology
- ST takes stake in 8x8 in exchange for VoIP, DSP core license
- ST Micro, Alcatel to co-develop GSM/GPRS chip sets based on DSP core
Latest News
- Rebellions Collaborates with SK Telecom and Arm Targeting Sovereign AI and Telecom Infrastructure
- Sarcina Launches UCIe-A/S Packaging IP to Accelerate Chiplet Architectures
- BrainChip Unveils Radar Reference Platform to Bridge the ‘Identification Gap’ in Edge AI
- Siemens accelerates AI chip verification to trillion‑cycle scale with NVIDIA technology
- SiFive Raises $400 Million to Accelerate High-Performance RISC-V Data Center Solutions; Company Valuation Now Stands at $3.65 Billion