The fabless-foundry model will survive (at least through 14-nm)
Handel Jones, International Business Strategies Inc.,
EETimes (6/15/2012 6:59 PM EDT)
Editor's note: This article was rewritten in rebutal to comments made in April by Mark Bohr, an Intel Senior Fellow. As reported by EE Times, Bohr said the fabless-foundry model is"collapsing."
What are the problems?
1. Parametric yields at 28 nm are not at expected levels. Process variables such as random dopant fluctuations, line width and line gap variations, and via resistance, which affect RC-related timing issues, result in both unpredictable and low parametric yields for the targeted specifications. The process variables have increasing impact on leakage, power consumption and yields.
To read the full article, click here
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- ARM Unveils IP Portfolio Program - New Model for ARM IP
- Carbon and MIPS Technologies Partner for Model Distribution
- CoWare and Carbon Announce CoWare Model Library Availability of Implementation-Accurate Models of ARM IP
- eInfochips announces DDR2 SDRAM SystemVerilog & VMM based Memory Model Generator Tool
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack