eInfochips Offers VeriSuite, One of the Industry's Most Comprehensive Verification Services Package and IP Library
- VeriSuite significantly reduces time to verify and development costs.
- VeriSuite includes most industry standard interfaces; verification environments easily scaled to system level.
Santa Clara, CA - November 22, 2004 - eInfochips, Inc., a leading provider of ASIC design and verification services, IP cores and embedded systems solutions, today launched VeriSuite, the industry's most comprehensive verification package. Backed by 200+ man-years of verification knowledge, it incorporates verification services and verification IP library. VeriSuite is reusable across a multitude of designs and therefore significantly reduces development costs and time to verify a chip.
"The competitive marketplace makes it imperative that all the elements of design, especially verification, which consumes nearly 70% of chip design time and efforts, be reusable," says Tapan Joshi, vice president of marketing. "VeriSuite is reusable across multiple modules and projects making it easier for customers to amortize verification costs across projects. It'll help customers verify their designs by offering a minimal learning curve and a fast ramp-up to functional testing stage".
With the addition of several new interfaces, eInfochips offers one of the most expansive libraries of verification components (VC's) for communication and SAN applications. The library includes industry standard interfaces such as Serial ATA, Fiber Channel, SONET/SDH, SPI 4, OCP, OTN and SFI. Serial ATA and Fiber Channel components are targeted to silicon chip companies in the Storage Area Networking space, while SONET/SDH, SPI, OTN and SFI VC's will address to chip manufacturers in the communications area.
Availability and Pricing
The Verification Components are individually priced at $10 K. The deliverables include fully verified, encrypted VC code with user guide, release notes and test suite. eInfochips' provides customer's with regular product updates and expert consultation. eInfochips' verification experts are available round the clock to meet customer requirements related to integrating VC's into the test environment and other support related issues. The components are available from eInfochips, contact them directly for more information. Website: www.einfochips.com
About eInfochips Inc.
eInfochips Inc., based in Santa Clara, is a leading provider of cutting edge ASIC design and verification services, Embedded systems solutions and IP cores. Their capabilities extend from Specification to Silicon, with knowledge spanning design entry, automated verification methodologies using HVLs, Verification Component development, PLI, physical layout & implementation and board design. The company's India and US design centers have delivered SoC and Embedded solutions to a variety of customers thus increasing their cost-effectiveness, reducing time-to-market and growing their market strength. A partial list of customers includes ATI, Rambus, Texas Instruments, Cisco, Cypress Semiconductors, Sun Microsystems, Philips, Broadcom, AMCC.
Related Semiconductor IP
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
- 10-bit Pipeline ADC - Tower 180 nm
- Simulation VIP for Ethernet UEC
- Automotive Grade PLLs, Oscillators, SerDes PMAs, LVDS/CML IP
- CAN-FD Controller
Related News
- ARM puts Java core, peripherals in one package
- CEVA Introduces Comprehensive Computer Vision Library Optimized for CEVA-MM3101 Imaging & Vision Platform
- Xilinx's Comprehensive Functional Safety Design Package Enables Smarter Factories and Medical Equipment
- eInfochips provides SOC engineering services to Astera Labs in developing industry's first PCIe 4.0 & 5.0 Smart Retimer SoC.
Latest News
- Qualitas Semiconductor Demonstrates Live of PCIe Gen 6.0 PHY and UCIe v2.0 Solutions at ICCAD 2025
- WAVE-N v2: Chips&Media’s Custom NPU Retains 16-bit FP for Superior Efficiency at High TOPS
- Quintauris releases RT-Europa, the first RISC-V Real-Time Platform for Automotive
- PQShield's PQCryptoLib-Core v1.0.2 Achieves CAVP Certification for a broad set of classical and post-quantum algorithms
- M31 Debuts at ICCAD 2025, Empowering the Next Generation of AI Chips with High-Performance, Low-Power IP