ChipIdea Characterized USB2.0 PHY Transceiver Macrocells.
Porto Salvo – October 16, 2003
, Chipidea broadens its offering of USB2.0 PHY Transceiver Macrocell 0.18 um solutions in the world leading foundries, including Tower, TSMC, UMC, Chartered and SMIC.
Chipidea’s USB2.0 PHY solutions are based on a modular platform concept that supports several customer-specific flavors, including Device and Host applications. They all have a very compact layout (Core area ~0.8 mm2). They offer the best energy efficiency on the market with 120 mW power dissipation in HS Transmission Mode, and include the following features:
- UTMI Intel specification compliant
- USB2.0 Integration in both Device and Host applications
- Serialize and de-serialize the parallel data for transmitter and receiver, respectively.
- 8-bit and 16-bit parallel interface
- Supports 480 Mbit/s "High Speed" (HS), 12 Mbit/s “Full Speed” (FS), "Low Speed" (LS) and 1.5 Mbit/s serial data transmission rates.
- Enhanced testability for reducing production testing cost
- Fully integrated terminating resistors.
Related Semiconductor IP
- Temperature Glitch Detector
- Clock Attack Monitor
- SoC Security Platform / Hardware Root of Trust
- SPI to AHB-Lite Bridge
- Octal SPI Master/Slave Controller
Related News
- Unveiling Silicon-proven USB 3.0 PHY IP Core in 22nm, Elevating High-Speed Data Transmission with Advanced Transceiver Technology, backward compatible with USB 2.0
- ChipIdea's Analog Front-End for Power Line Communications Modem sucessfully integrated in INSONET transceiver chip
- Chipidea Microelectronics SA Licenses ARCtangent for Single-chip Bluetooth Application
- Chipidea Microelectronics SA has again successfully qualified a Dual mode UMTs/GSM Baseband AFE-CI7185oa
Latest News
- RaiderChip NPU for LLM at the Edge supports DeepSeek-R1 reasoning models
- The world’s first open source security chip hits production with Google
- ZeroPoint Technologies Unveils Groundbreaking Compression Solution to Increase Foundational Model Addressable Memory by 50%
- Breker RISC-V SystemVIP Deployed across 15 Commercial RISC-V Projects for Advanced Core and SoC Verification
- AheadComputing Raises $21.5M Seed Round and Introduces Breakthrough Microprocessor Architecture Designed for Next Era of General-Purpose Computing