Cassia Proposes ‘Better Math’ for AI Efficiency
By Sally Ward-Foxton, EETimes | October 1, 2025
Startup Cassia wants to ‘do math better’ by approximating mathematical functions and implementing these approximations in smaller, more power efficient hardware IP for AI acceleration.
The idea began as a spare time project for Cassia founder and CEO James Tandon after he came across scientific papers from another group that discussed the accuracy loss associated with approximating certain math functions rather than quantizing (reducing numerical precision, which reduces prediction accuracy).
To read the full article, click here
Related Semiconductor IP
- Dataflow AI Processor IP
- Powerful AI processor
- AI Processor Accelerator
- High-performance AI dataflow processor with scalable vector compute capabilities
- AI DSA Processor - 9-Stage Pipeline, Dual-issue
Related News
- Alphawave Semi Taped-Out Industry Leading 64Gbps UCIe™ IP on TSMC 3nm for the IP Ecosystem, Unleashing Next Generation of AI Chiplet Connectivity
- Cadence Partners with TSMC to Power Next-Generation Innovations Using AI Flows and IP for TSMC Advanced Nodes and 3DFabric
- PGC Strengthens Cloud and AI ASIC Acceleration with Synopsys’ Next-Generation Interface and Memory IP on Advanced Nodes
- Andes Announces First Customer Tape-Out Delivery of the AX46MPV for Cloud AI Acceleration
Latest News
- Access Advance and Via Licensing Alliance Announce HEVC/VVC Program Acquisition
- Efficient Computer Launches Electron E1 Evaluation Kit to Accelerate Energy-Efficient Computing
- S2C, MachineWare, and Andes Introduce RISC-V Co-Emulation Solution to Accelerate Chip Development
- Qualitas Semiconductor Signs First ASIL-B-Compliant MIPI Sub-system IP Agreement for Autonomous ADAS SoC
- ISOLDE Project Demonstrates Advancements in European Open-Source RISC-V for Automotive, Space, and IoT