Cadence spin-out, Commsonic has added a multi-mode, multi-rate QAM modem and 802.16 Channel Codec to its family of broadband communications IP
Cambridge(UK), Thursday 27th March, 2003 - Cambridge-based, Cadence spin-out, Commsonic has added a multi-mode, multi-rate QAM modem and 802.16 Channel Codec to its family of broadband communications IP.
The CMS0004 modulator and CMS0006 demodulator support QAM orders from 2 to 256 and are intended for a wide range of applications including terrestrial, cable and satellite links carrying up to STM-1 capacity (155Mb/s).
The CMS0005 Channel Codec implements all of the physical-layer formatting, deformatting and FEC functions specified by the IEEE 802.16a Wireless Metropolitan Area Network (WMAN) Standard. This new OFDM-based Standard supports data rates up to approximately 100Mb/s and has been designed for the robust delivery of multi-media services over fixed point-to-point and point-to-multipoint wireless links in the frequency range from 2GHz to 11GHz. Its most immediate application is as a non-line-of-sight (NLOS) backhaul technology for 'hotspots' operating the 802.11 Wireless Local Area Network (WLAN) Standard.
Commsonic's IP family is supplied with a source-level (VHDL) licence and includes vector-matched C++ models for use in system simulations. Other family members include configurable Reed-Solomon and Convolutional FEC codecs.
Related Semiconductor IP
- UCIe D2D Adapter & PHY Integrated IP
- Low Dropout (LDO) Regulator
- 16-Bit xSPI PSRAM PHY
- MIPI CSI-2 CSE2 Security Module
- ASIL B Compliant MIPI CSI-2 CSE2 Security Module
Related News
- Moving Towards a Single Chip, Multi Band WLAN Solution NewLogic Releases its Embeddable 802.11a Modem IP Core
- Chips&Media has licensed its VP9 and HEVC multi decoder IP to Nexell and other 5 chip manufacturers
- Silicon IP Provider, Chips&Media Unveils New Multi Video Codec IP, WAVE6 Gen2+
- Sequans Expands Business Model with Technology IP Licensing and Engineering Services
Latest News
- Arasan Announces immediate availability of its UFS 5.0 Host controller IP
- Bolt Graphics Completes Tape-Out of Test Chip for Its High-Performance Zeus GPU, A Major Milestone in Reducing Computing Costs By 17x
- NEO Semiconductor Demonstrates 3D X-DRAM Proof-of-Concept, Secures Strategic Investment to Advance AI Memory
- M31 Collaborates with TSMC to Achieve Tapeout of eUSB2V2 on N2P Process, Advancing Design IP Ecosystem
- Menta’s eFPGA Technology Adopted by AIST for Cryptography and Hardware Security Programs