Bitcoin ASIC in Chips-to-$ Race
Running hot on 84 amps
Rick Merritt, EETimes
8/14/2014 05:25 PM EDT
CUPERTINO, Calif. – In eight short months, startup CoinTerra designed a 28nm ASIC that pushes the envelope in logic power density and shipped a system using four of them. Its tale is typical of the headlong race to hardware acceleration in the emerging bitcoin economy
Bitcoin is the most high profile of several emerging digital currencies founded on a set of mathematical formulas and open source software released in 2009. Its de-centralized economy is based on bitcoin mining, essentially clearing transactions that use an increasingly complex set of cryptographic puzzles based on the SHA-256 hashing algorithm.
The first bitcoin mining systems to crack the code of a puzzle get rewarded, sometimes to the tune of millions in virtual currency. Initially participants used standard PCs for bitcoin mining. But as transactions became increasingly complex the community moved to GPU and FPGA accelerators and -- since January 2013 -- to ASICs.
To read the full article, click here
Related Semiconductor IP
- ReRAM NVM in DB HiTek 130nm BCD
- UFS 5.0 Host Controller IP
- PDM Receiver/PDM-to-PCM Converter
- Voltage and Temperature Sensor with integrated ADC - GlobalFoundries® 22FDX®
- 8MHz / 40MHz Pierce Oscillator - X-FAB XT018-0.18µm
Related News
- Bitech Technologies Reports Completion of Its FPGA design and the Launch of Its ASIC Initiatives for Bitcoin Mining
- Uniquify, HashFast Ink Agreement to Produce ASICs to Increase Hashing Speed for Bitcoin Miners
- VMC uses eASIC to Achieve 24.756 TH/s Bitcoin Miner
- HashFast and Uniquify Announce Tape Out of "Golden Nonce" Bitcoin Network Transaction Verification Chip to TSMC's 28HPM Process
Latest News
- Joya Design Takes Neuromorphic Chip from Design to Device with First Innatera-Powered Consumer Audio Product at AWE China
- Arm expands compute platform to silicon products in historic company first
- Synopsys Supports New Arm AGI CPU with Full-Stack Design Solutions
- Altera and Arm Collaborate to Deliver Efficient, Programmable Solutions for AI Data Centers
- JEDEC® Releases Updated LPDDR5/5X SPD Standard with Enhanced Mode‑Switching Support