AMD: At 45 nm and beyond ICs require high level HW/SW tools
By Anne-Francoise Pele, Courtesy of EE Times
May 4 2006 (5:52 AM)
BUDAPEST, Hungary — Advanced Micro Devices Inc. is anticipating system design requirements at the 45-nm node and beyond. The chip maker sees a need to work at higher levels of abstraction; creating a design file that generates both the software and the hardware.
One key to enabling such a revolution in design is the fact that much of electronics will be based on digital media and streaming content.
First enabled by computers, digital content is now starting to shape industrialized society and wash back to reshape electronic equipment and processors, according to Robert Ober, AMD fellow and executive at the company’s Office of Strategy and Technology.
"Digital content is king," said Ober in a presentation at the Future Horizons Electronics Forum here. He cited broadband and ubiquitous connectivity as supporting evidence. The next quesiton is how the semiconductor industry should react and what changes are required as it moves towards the 45-nm manufacturing node?
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related News
- NewLogic introduces the SmartSplit Architecture. The optimized HW & SW partitioning of the WiLD(TM) 802.11 WLAN IP family enables new handheld applications
- MorethanIP releases a new 10/100Mbps Ethernet MAC Core HW- and SW- compatible with MorethanIP 10/100/1000 MAC
- Dialog Semiconductor adds ARM multicore support in next generation of system level power management ICs
- Audio Codec IP - 40 nm: Dolphin Integration passed TSMC IP9000 Level 4 qualification at Low Power process
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack