Intilop and Altera to present a live demo of 10G Ultra Low latency UDP Offload core using Altera's OpenCL at the SC-12 Conference in Salt Lake city, Utah.
The 2-Server system using Intilop’s UDP Offload Core and OpenCL™ implementing NASDAQ’s OPRA feed on Stratix V FPGA delivers unprecedented performance, reduced development time & accelerated Time-to-Market.
Santa Clara, CA., November 9th, 2012— Intilop, Inc. a pioneer and a recognized leader in providing Ultra-Low latency networking Mega IP building blocks, systems and solutions, announced they will showcase Altera’s SDK for OpenCL™ with their 4th Gen. SX-Series 10G Ultra-Low latency UDP Offload Core delivering sub-micro second wire-to-host latency. The live demo will be shown in Altera’s booth #430 at the SuperComputing-12 Conference taking place November 13th thru 15th, 2012 at Salt Palace Convention Center, Salt Lake City, Utah.
Customers will be able to use Intilop’s UDP IP-Core with OpenCL™ for implementing complex algorithms on FPGAs that will be combining the programming language with the parallel processing capabilities to deliver significantly higher system performance and shorter development times. OpenCL™ for FPGAs delivers a significant productivity advantage to Intilop and its end-customers by modeling algorithms in a C-based language which are then seamlessly converted to HDL. The industry leading Ultra-low-latency 10G TCP Offload with integrated OpenCL will be available soon.
“OpenCL™ is an open, royalty-free standard for cross-platform, parallel programming of hardware accelerators, including CPUs, GPGPUs and FPGAs. Our SDK for OpenCL™ enables software programmers to quickly and easily use the massively parallel and power efficient architecture of an FPGA to provide algorithm and upper layer protocol acceleration,” said Mike Strickland, Computer & Storage Sr. Product Line Manager, Altera corporation.
“We are achieving the best synergies, with our ultra-Low latency protocol accelerators combined with Altera’s robust and stable C-based OpenCL™ solution that not only substantially accelerates development time of high-performance, FPGA-based complex systems, but also improves time-to-market for our customers,” said Kelly Masood, CTO at Intilop corporation.
Intilop’s UDP, TCP Offload engines and other solutions are targeted at end equipment-makers that provide solutions to financial markets, web servers, email servers, high-end servers in Data centers; cloud computing, Government network systems and University campus network systems.
About Intilop:
Intilop is a developer, recognized leader and pioneer in advanced networking silicon IP and system solutions, custom hardware solutions, SoC/ASIC/FPGA integrator and total system solutions provider for Networking, Network Security, storage and Embedded Systems.
Website: www.intilop.com
Pricing and product info contact: info@intilop.com
Booth No. 430, Salt Lake City, Utah: www.sc12.supercomputing.org
Related Semiconductor IP
Related News
- Intilop delivers their enhanced Dual 10G iNICs with Ultra-low latency TCP and UDP Offload accelerators, benchmarking sub micro second wire-to-host latency and Ultra high data throughput
- Intilop delivers true Ultra-low latency 10G NIC with their 5th Gen 76 ns TCP & UDP Offload technology breaking yet another record in latency and bandwidth
- BittWare and PLDA Partner to Deliver 10G Low Latency TCP Offload, UDP and PCIe IP Cores on Altera Stratix-based Hardware
- Intilop releases Network Security TOE Module for Altera and Xilinx FPGAs for their 10G & 40G Full TCP & UDP Offload Engines
Latest News
- HPC customer engages Sondrel for high end chip design
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers