IP Catalog > Low Jitter PLL

low jitter PLL IP

Filter
Filter

Login required.

Sign in

Login required.

Sign in

Search (340)
Compare 340 IP from 32 vendors (1 - 10)
  • Low Jitter PLL with Accurately Spaced 16-Phase Output Clocks
    • 100MHz up to 1.1GHz input/output frequency range
    • Static phase-phase variation better than +-1.8% of output period
    • Optional 8-phase output mode for power savings
    • Small footprint (0.03mm^2)
  • Ultra-low power and low jitter PLL
    • Ultra-low power, low to 100uA@100MHz;
    • Low jitter design
  • Low Jitter 1.25GHz to 2.5GHz Quadrature Output PLL
    • Type II, 3rd order low Jitter PLL
    • Auto calibration for process and temperature (USP)
    • Programmable frequency using CSR registers
    • 2.5 GHz and 1.25 GHz quadrature clocks
  • Low noise PLL operating at up to 3.25GHz (90nm UMC)
    • Low jitter PLL for a wide range of applications
    • Output frequencies 1-3.25GHz.
    • Reference clock 100-156.25MHz
    • Power supply 1.2V
  • Low noise PLL operating at 1.25GHz and 625MHz (90nm UMC)
    • Low jitter PLL for a wide range of applications
    • Output frequencies 1.25GHz and 625MHz
    • Reference clock 156.25 MHz with 1/2, 1/4 and 1/8 speed
    • Single power supply 0.9-1.3V
  • Low noise PLL operating at up to 5GHz (40nm TSMC)
    • Low jitter PLL for a wide range of applications
    • Output frequencies 3-5GHz, 1.5-2.5GHz and 0.75-1.25GHz
    • Reference clock 50-800MHz
    • Power supplies 0.9V and 1.2V
  • Low noise PLL operating at up to 3.25GHz (40nm TSMC)
    • Low jitter PLL for a wide range of applications
    • Output frequencies 2-3.3GHz, 1-1.65GHz and 500-825MHz
    • Reference clock 50-800MHz
    • Power supplies 0.9V and 1.2V
  • MIPI D-PHY Combo LVDS DSI TX IP
    • Compliant with MIPI® Alliance Specification for Display Serial Interface (DSI) V1.2
    • Compliant with MIPI® Alliance Standard for Display Bus Interface (DBI) V2.0
    • Compliant with MIPI® Alliance Standard for Display Pixel Interface (DPI) V2.0
    • Compliant with MIPI® Alliance Specification for D-PHY V1.2
  • MIPI D-PHY DSI TX IP
    • Compliant with MIPI® Alliance Specification for Display Serial Interface (DSI) V1.2
    • Compliant with MIPI® Alliance Standard for Display Bus Interface (DBI) V2.0
    • Compliant with MIPI® Alliance Standard for Display Pixel Interface (DPI) V2.0
    • Compliant with MIPI® Alliance Specification for D-PHY V1.2
  • MIPI C-PHY DSI TX IP
    • Compliant with MIPI® Alliance Specification for Display Serial Interface (DSI) V1.2
    • Compliant with MIPI® Alliance Standard for Display Bus Interface (DBI) V2.0
    • Compliant with MIPI® Alliance Standard for Display Pixel Interface (DPI) V2.0
    • Compliant with MIPI® Alliance Specification for C-PHY V1.1
×
Semiconductor IP