eSPI Controller IP
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eSPI Controller IP
- Compliant with eSPI base specification as defined in Enhanced Serial Peripheral Interface (eSPI) Specification rev.1.0.
- Supports Master and Slave Modes
- Supports Single, Dual and Quad modes
- Supports TX and RX operation as per specs
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Express Serial Peripheral Interface IP Core
- Compliant with eSPI base specification as defined in Enhanced Serial Peripheral Interface (eSPI) Specification rev.1.0.
- Supports Master and Slave Modes
- Supports Single, Dual and Quad modes
- Supports TX and RX operation as per specs
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eSPI & SPI Slave Controller w/FIFO
- Slave eSPI and standard Master SPI Modes
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eSPI & SPI Master Controller w/FIFO
- Master eSPI and standard Master SPI Modes
- Master SPI Modes
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eSPI & SPI Master/Slave Controller w/FIFO (APB, AHB, or AXI Bus)
- Master & Slave eSPI and standard Master/Slave SPI Modes
- eSPI Full Duplex Transfers - Command Phase followed by Response Phase
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Enhanced Serial Peripheral Interface – Master/Slave with single, dual, and quad eSPI Bus support for Intel CPU’s
- Rapid prototyping and time-to-market reduction
- Design risk elimination
- Development costs reduction