eFlash IP
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eFlash BIST IP
- The BIST can realize all eFlash testing items, covering UMC’s 40nm and 55nm processes, as well as SST’s 0.11um and 0.18um processes, and customized embedded eFlash IP wafer software testing and final testing.
- The BIST features a flexible serial interface, reducing the need for IC test pins and increasing testing flexibility.
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8Kx16 Bits OTP (One-Time Programmable) IP, VIS 110nm E-Flash 1.5V/3.3V Process
- Fully compatible with VIS 110nm E-Flash process
- Low voltage: 1.5 V ± 10% read and 3.9 V ± 5% program
- High speed: 10-µs program time per bit, and 50-ns read cycle time
- Wide temperature: -40°C to 125°C for read and 10°C to 40°C for program
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40nm eflash 3.3V Programmable 1.1V LDO Regulator with 500mA max. output
- Programmable 0.9V to 1.2V output voltage in 100mV steps
- 2% LDO output variation across process, supply and temperature
- 50uA quiescent current
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Ultra low quiescent current LDO in TSMC 40nm ULP eFlash
- Very low quiescent and leakage for Low-Power
- Can supply always-on very low load
- Supports wide input voltage range from 2.7V to 5.5V
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TSMC 40 ULP eFlash Combo voltage regulator combining a linear regulator for active mode with an ultra-low quiescent regulator for sleep mode
- Embedded RCU (Regulator Control Unit) to manage booting and safe mode transitions
- Configurable LDO output current to fit the application (from 100 mA to 500 mA)
- Low Bill-of-Material: fully integrated feedback and active compensation loop to reduce the number of additional external passive components
- Low Output Ripple
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Ultra-low power 32 kHz RC oscillator in TSMC 40 ULP eFlash
- Ultra-low power for best-in-class power consumption of the always-on domain during sleep / deep sleep modes
- Fast wake-up
- Active, shutdown and stand-by modes
