crypto IP

Filter
Filter

Login required.

Sign in

Login required.

Sign in

Login required.

Sign in

Compare 349 IP from 59 vendors (1 - 10)
  • NIST’s ASCON Lightweight Crypto Algorithm Accelerator
    • The ASCON-IP-41 is an efficient implementation of NIST’s lightweight crypto algorithm family ASCON. ASCON is a single algorithm defined in different modes to support AEAD and HASH operations.
    • As a multi-purpose algorithm with minimal area requirements ASCON is extremely suitable for low-cost and low-power applications.
  • Secure-IC's Securyzr Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
    • Scalable architecture and crypto engines for optimal performance/resource usage
    • Configurable for perfect application fit
    • 100% CPU offload with low latency and high throughput
    • DPA countermeasures Full software/driver support
    Block Diagram -- Secure-IC's Securyzr Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
  • Post Quantum ready Public Key Crypto HW acceleration library optimized for networking applications
    •  ML-KEM KeyGen, Encaps, Decaps operations for all security modes in FIPS 203;
    •  ML-DSA Keygen, Sign, Verify operations for all security modes in FIPS 204;
    •  ECDSA Sign/Verify operations for all NIST prime field curves;
    •  ECC public key generation for all NIST prime field standardized curves;
    •  SHA3/SHAKE operations specified in FIPS 202;
  • TLS 1.3 Compliant Crypto Coprocessor
    • NIST CAVP certified and OSCCA standard compliant crypto engine suite
    • Includes private/public key ciphers, message authentication code, hashes, and key derivation
    • Key wrapping function for the secure export of keys
    • Public-key coprocessor for digital signatures and key agreements over elliptic/Edward curves
    Block Diagram -- TLS 1.3 Compliant Crypto Coprocessor
  • nQrux™ Crypto Module
    • Compatible with applicable NIST, IETF, and IEEE standards, RFCs, and test vectors for compliance and certification programs
    Block Diagram -- nQrux™ Crypto Module
  • SHA-3 Crypto IP Core
    • FIPS 202 compliant
    • Supports cryptographic hashing for SHA-3 in 224/256/384/512 mode
    • Extendable-Output Functions for SHAKE 128/256
    • AMBA® AXI4-Stream 
    Block Diagram -- SHA-3 Crypto IP Core
  • Network Security Crypto Accelerator
    • Scalable architecture & crypto engines for optimal performance/resource usage
    • Configurable for perfect application fit
    • 100% CPU offload with low latency and high throughput
    Block Diagram -- Network Security Crypto Accelerator
  • SM4-GCM Multi-Booster crypto engine
    • ASIC & FPGA
    • High throughput
    • Guaranteed performance with small packets
    Block Diagram -- SM4-GCM Multi-Booster crypto engine
  • AES-GCM Ultra-low latency crypto engine
    • High throughput: 64 GB/s (512 Gbps)
    • Ultra-low latency
    • Optional CRC support for data integrity
    • 128-bit and 256-bit key
    • NIST SP 800-38D compliant
    Block Diagram -- AES-GCM Ultra-low latency crypto engine
  • Embedded Flash Protection with Hardware Root of Trust and Lite Crypto Engine
    • PUFef is designed to protect embedded Flash with a Hardware Root of Trust and a lite crypto engine of RC6.
    • The RC6 provides a comprehensive level of security while also minimizing overall size.
    • Before attempting to hack the crypto engine, attackers would first have to destroy the embedded Flash.
    Block Diagram -- Embedded Flash Protection with Hardware Root of Trust and Lite Crypto Engine
×
Semiconductor IP