Network Security Crypto Accelerator

Overview

Accelerates cryptographic operations in System-on-Chip (SoC) environment on FPGA or ASIC.

To answer the needs of high-performance systems, a new generation of powerful processors is being designed and deployed. These multi-core SoCs contain dedicated hardware accelerators that offload challenging tasks, such as network protocol computation, AI and deep learning, and – most importantly – security. For a security performance that matches the speed of the new SoCs we have developed a scalable hardware IP block that handles encryption at speeds from a few Gbps to over 100Gbps, depending on the needs.

The Network Security Crypto Accelerator is used to accelerate/offload MACsec, IPsec, VPN, TLS/SSL, disk encryption, or any other custom application, requiring symmetric cryptography algorithms. It can also be combined with the eSecure Root of Trust module to form a complete secure enclave, that will handle the keys without exposing them to the software, which makes it suited for even the most regulated and security-sensitive industries.

Key Features

  • Scalable architecture
  • Full software/driver support – Linux drivers (Crypto API integration)
  • Configurable for perfect application fit
  • Easy integration AXI interface
  • 100% CPU offload with low latency and high throughput
  • Low power
  • Optional DPA countermeasures for AES and SM4
  • Can use keys hidden from CPU

Benefits

  • Offload the compute intensive Public Key operations (Diffie-Helmann, Signature Generation and Verification)

Block Diagram

Network Security Crypto Accelerator Block Diagram

Applications

  • Secure Communication (TLS, MACsec, IPSec, ...)
  • Secure Storage

Deliverables

  • Netlist or RTL
  • SW drivers (Linux)
  • Scripts for implementations
  • Self-checking RTL test-bench based on referenced vectors
  • Documentation

Technical Specifications

Availability
Now
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Semiconductor IP