cJTAG IP
Filter
Compare
12
IP
from 6 vendors
(1
-
10)
-
cjTAG IEEE 1149.7 Compact TAP Controller
- Supports IEEE 1149.7 classes 0–5 (selected through hardware configuration parameter)
- Partitioned along IEEE 1149.7-specified functional boundaries (so that only the required hardware is included):
- Supports all mandatory and optional scan formats: JScan0–3, SScan0–3, OScan0–7, and MScan
- Supports all mandatory and optional cJTAG commands
-
cjTAG IEEE 1149.7 DTS Adapter
- IEEE 1149.1 interface to existing test/debug hardware
- IEEE 1149.7 interface to target system(s)
- Supports all IEEE 1149.7 scan formats
- Supports all IEEE 1149.7 scan topologies
-
JTAG 2-Wire to 4-Wire Adapter
- IEEE 1149.1 and IEEE 1147.7 compatible.
- Small logic overhead.
- Clock frequencies to 25MHz.
-
64-Bit RISC-V High Performance Processor
- RISC-V RV64 I/M/A/C/F/D/P ISA supported
- ECLIC(Enhanced Core Level Interrupt Controller)
- 6-Stage Pipeline
-
ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications
- High-speed, 32-bit, dual-issue, 10-stage pipeline
- Multicore support for up to 16 CPUs and up to 16 user hardware accelerators per processor cluster
-
ARC-V RMX-100 ultra-low power 32-bit RISC-V processor for embedded applications
- 32-bit RISC-V embedded CPU with balanced 3-stage pipeline
- DSP implementation to extend the RISC-V baseline (RMX-100D)
- 2 KB to 64 KB instruction L1 cache
- Up to 2MB instruction and data closely coupled memory (CCM)
-
ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
- High-speed, 32-bit, dual-issue, 10-stage pipeline
- Multicore support for up to 16 CPUs and up to 16 user hardware accelerators per processor cluster
-
ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
- 32-bit RISC-V embedded CPU with a 5-stage pipeline
- DSP implementation to extend the RISC-V baseline (RMX-500D)
- 2 KB to 64 KB instruction & data L1 caches
-
RISC-V ARC-V RMX-100 Ultra-low Power 32-bit Processor IP for Embedded Applications
- RISC, and RISC + DSP 32-bit processors for ultra-low power embedded apps
- Based on the RISC-V ISA, leveraging standard 32-bit protocols (and extensions)