cjTAG IEEE 1149.7 DTS Adapter

Overview

The DTS Adapter from Silvaco enables an existing IEEE 1149.1 debug test system (DTS) to take advantage of the advanced debug/test capabilities available with today’s IEEE 1149.7-enabled semiconductor devices. Offered as a standalone product or as a companion product to our Compact JTAG IP for target systems, the DTS Adapter functions as a JTAG-to-Compact JTAG translator for the debug test system (DTS), supporting debug/test of IEEE 1149.7-compliant target systems.

Easily implemented in FPGA or ASIC, the DTS Adapter provides the signal conversion and signal generation needed for existing IEEE 1149.1 (JTAG) test hardware to support IEEE 1149.7 features such as 2-pin operation, online/offline operation, Star topologies, and Scan Topology Training. With the DTS Adapter inserted into your existing IEEE 1149.1 debug/test hardware chain, you only need to upgrade your debug/test software to take full advantage of the advanced test/debug capabilities offered by IEEE 1149.7 enabled semiconductor devices.

Key Features

  • IEEE 1149.1 interface to existing test/debug hardware
  • IEEE 1149.7 interface to target system(s)
  • Supports all IEEE 1149.7 scan formats
  • Supports all IEEE 1149.7 scan topologies
  • Automatic translation between IEEE 1149.1 and IEEE 1149.7 signalling for IEEE 1149.7 2-pin scan formats (MScan, OScan0-7, SScan0-3)
  • Operation is transparent to IEEE 1149.1 test hardware, except for special functions that require programming the DTS Adapter
  • Generation of IEEE 1149.7 Escape Sequences as commanded by test/debug software
  • Control of TDI and TDO for IEEE 1149.7 Scan Topology Training
  • Programmable control and data segments for IEEE 1149.7 segmented scan formats
  • Proven interoperability with IEEE 1149.7 Compact TAP from Silvaco
  • Safe connection/disconnection of target system(s)―DTS Adapter output signals are disabled (high-impedance) until enabled by DTS software
  • Easily implemented in FPGA or ASIC
  • Also useful in simulation as an IEEE 1149.7 stimulus generator

Benefits

  • Extend the life of IEEE 1149.1 debug/test hardware for IEEE 1149.7 debug/test applications
  • Take advantage of advanced IEEE 1194.7 debug/test features before IEEE 1149.7-enabled test hardware becomes widely available
  • Accelerate design verification by using DTS Adapter as an IEEE 1149.7 bus transactor in simulation

Block Diagram

cjTAG IEEE 1149.7 DTS Adapter Block Diagram

Deliverables

  • Synthesizable Verilog source code
  • Integration testbench and tests
  • Documentation
  • Scripts for simulation and synthesis with support for common EDA tools

Technical Specifications

Maturity
Silicon Proven
Availability
now
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Semiconductor IP