Samsung 8nm IP
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14b, 4Gsps, Self-Calibrating Current Steering IQ DAC for 5G & WIFI6 in samsung 8nm
- Samsung 8nm LPP process
- Metal Scheme: 1p8m_5x2z
- 14b Resolution, Fs = 4Gsps
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12b, 1Gsps, Self-Calibrating Current Steering IQDAC in samsung 8nm for 5G & WIFI6
- • Technology: Samsung 8nm LPP process
- • Metal Scheme:
- 11M_3Mx_6Dx_1Gx_1Iz_LB
- • 12b Resolution, Fs = 1Gsps
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Dual channel 12-bit, 1GS/s ADC in Samsung 8nm for 5G & WIFI6
- • Technology: Samsung 8nm LPP process
- • Metal Scheme:11M_3Mx_6Dx_1Gx_1Iz_LB
- • Dual channel 12-bit, 1GS/s Analog-to-Digital Converter
- • Differential analog input
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16b 80Msps DAC with 10KHz BW in samsung 8nm
- Technology: Samsung 8nm LPP process
- Metal Scheme:11M_3Mx_6Dx_1Gx_1Iz_LB
- Programmable Gain
- Programmable Offset
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12b, 2Gsps, Self-Calibrating Current Steering IQDAC in samsung 8nm for 5G & WIFI6
- Technology: Samsung 8nm LPP process
- Metal Scheme: 11M_3Mx_6Dx_1Gx_1Iz_LB
- 12b Resolution, Fs = 2Gsps
- Programmable 20mA Differential Current source
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Dual channel 12-bit, 2GS/s ADC for 5G & WIFI6 in Samsung 8nm
- Technology: Samsung 8nm LPP process
- Metal Scheme:11M_3Mx_6Dx_1Gx_1Iz_LB
- Dual channel 12-bit, 2GS/s Analog-to-Digital Converter
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HDMI 2.0 RX PHY in Samsung (8nm)
- Aggregate bandwidth of 18 Gbps to support up to 4K x 2K resolution at 60 Hz frame rate and 8-bit per color for a flickerless ultra high-definition experience
- 1, 2, or 4 input ports
- Four levels of equalization for long cable support and clean signals
- Adaptive equalization in RX core to compensate for the signal attenuation and inter-symbol interference caused by long cables
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LPDDR4 multiPHY V2 in Samsung (8nm) for Automotive
- Low latency, small area, low power
- Compatible with JEDEC standard LPDDR4 SDRAMs up to 4,267 Mbps
- Maximum data rate is process technology dependent
- Compatible with JEDEC standard DDR4 SDRAMs up to 3,200 Mbps
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MIPI D-PHY v1.2 TX 4 Lanes in Samsung (8nm)
- Compliant with the MIPI D-PHY specification
- Fully verified hard macro
- Up to 2.5 Gb/s per lane
- Aggregate throughput up to 10 Gb/s in 4 data lanes
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MIPI D-PHY v1.2 RX 2 Lanes in Samsung (8nm)
- Compliant with the MIPI D-PHY specification
- Fully verified hard macro
- Up to 2.5 Gb/s per lane
- Aggregate throughput up to 10 Gb/s in 4 data lanes