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SRAM Compiler on TSMC 28nm IP

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  • 8-stage superscalar RISC-V processor
    • The 64-bit AX45 is an 8-stage superscalar processor that supports RISC-V specification, including “G” (“IMAFD”) standard instructions, “C” 16-bit compression instructions, “P” Packed-SIMD/DSP instructions, “B” bit manipulation, and Andes performance enhancements, plus Andes Custom Extension™ (ACE) for user-defined instructions.
    Block Diagram -- 8-stage superscalar RISC-V processor
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Semiconductor IP