SATA Express IP
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228
IP
from 10 vendors
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10)
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PCI Express Gen3 / SATA3 SERDES PHY on Samsung 28FDSOI
- Programmable SERDES analog front end that supports 1 to 8 Gbps standard serial protocols
- Compact form factor – 0.165 mm2 active silicon area per lane including ESD
- Industry leading low power – typically 6.5 mW/Gbps including termination
- Finely configurable receiver impedance, CTLE gain and bandwidth, with fully adaptive CTLE and DFE
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+
- Compatible with PCIe/USB3/SATA base Specification
- Fully compatible with PIPE3.1 interface specification
- Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
- Support 16-bit or 32-bit parallel interface when encode/decode enabled
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in UMC 55SP/EF
- Compatible with PCIe/USB3/SATA base Specification
- Fully compatible with PIPE3.1 interface specification
- Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
- Support 16-bit or 32-bit parallel interface when encode/decode enabled
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 12SF++
- Compatible with PCIe/USB3/SATA base Specification
- Fully compatible with PIPE3.1 interface specification
- Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
- Support 16-bit or 32-bit parallel interface when encode/decode enabled
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 28SF
- Compatible with PCIe/USB3/SATA base Specification
- Fully compatible with PIPE3.1 interface specification
- Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
- Support 16-bit or 32-bit parallel interface when encode/decode enabled
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 55LL
- Compatible with PCIe/USB3/SATA base Specification
- Fully compatible with PIPE3.1 interface specification
- Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
- Support 16-bit or 32-bit parallel interface when encode/decode enabled
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USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SAM 8LPP
- Compatible with PCIe/USB3/SATA base Specification
- Fully compatible with PIPE3.1 interface specification
- Data rate configurable to 1.5G/2.5G/3G/5G/6G for different application
- Support 16-bit or 32-bit parallel interface when encode/decode enabled
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USB 3.0/ PCIe 2.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SAM 8LPP
- Compatible with PCIE/USB3/SATA base Specification
- Fully compatible with PIPE3.1 interface specification
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PCI Express - Configurable PCI Express 4.0 IP
- Compliant with "PCI Express™ Base Specification, Rev. 4.0 Version 1.0"
- Compliant with "PHY Interface For the PCI Express, SATA, and USB3.1 Architectures"
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USB 3.0/ PCIe 3.0/ SATA 3.0 Combo PHY IP, Silicon Proven in SMIC 14SF+
- Support for SATA3(6.0Gbps) ,USB3.0(5Gbps) and PCIe3(8.0Gbps),
- Backward compatible with 1.5Gbps, 3.0bps for SATA
- Backward compatible with 2.5Gbps and 5Gbps for PCIe
- Full compatible with PIPE4 interface specification