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Post-Quantum Cryptography Accelerator IP

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Compare 8 IP from 7 vendors (1 - 8)
  • APB Post-Quantum Cryptography Accelerator IP Core
    • Implements ML-KEM and ML-DSA post-quantum cryptography digital signature standards. The system interface is an microprocessor slave bus (APB, AHB, AXI options are available).
    • The design is fully synchronous and requires only minimal CPU intervention due to internal microprogramming sequencer.
    Block Diagram -- APB Post-Quantum Cryptography Accelerator IP Core
  • Post-Quantum Cryptography Processor
    • PQPlatform-CoPro (PQP-HW-COP) adds PQShield’s state-of-the-art post-quantum cryptography (PQC) to your security sub-system, with optional side-channel countermeasures (SCA).
    • PQPlatform-CoPro can be optimized for minimum area as part of an existing security sub-system.
    • PQPlatform-CoPro is designed to be run by an existing CPU in your security system, using PQShield’s supplied firmware.
    Block Diagram -- Post-Quantum Cryptography Processor
  • Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
    • Turn-key implementations of the NIST FIPS recommended CRYSTALS post-quantum for key encapsulation (KEM) and digital signature algorithm (DSA)
    Block Diagram -- Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
  • Post-Quantum Cryptography IP: Crystals Kyber - Crystals Dilithium - XMSS - LMS
    • 512 and/or 768 and/or 1024-bit secret key length
    • Implementation protected against Side-Channel Attacks (Key Generation and Key Decapsulation operations are sensitive):
    • Hybrid hardware-software tunable solution
    • Tunable in performance or power/area
  • Agile PQC Public Key Accelerator
    • Agile IP comprised of HW/FW/SW, adaptable to future standards’ evolution
    • Highly configurable IP can be tuned for specific applications with most optimal PPA
    • Scalable PQC PKA IP complies with latest NIST PQC algorithms
  • SHA3 core for accelerating NIST FIPS 202 Secure Hash Algorithm
    • Supports variable length SHA-3 Hash Functions
    • Supports Extendable Output Functions (XOF)
    • Configurable architecture for achieving the required performance and silicon area
    Block Diagram -- SHA3 core for accelerating NIST FIPS 202 Secure Hash Algorithm
  • Cryptographic Cores IP
    • The Cryptographic Cores IP portfolio delivers secure, high-performance implementations of symmetric, asymmetric, and post-quantum algorithms.
    • Designed for low-area, low-latency operation, the silicon-proven cores help SoC designers and embedded teams build trusted, efficient devices for IoT, automotive, medical, and industrial markets.
  • Ultra-Secure, PQC-first, Root-of-Trust Security Platform
    • A complete PQC-focused security system that provides architects with the tools needed for the quantum age and beyond.
    • PQPlatform-TrustSys is a fully programmable Root-of-Trust subsystem, containing advanced post-quantum (ML-KEM, ML-DSA) and classical cryptography (ECC and RSA – essential for hybrid and legacy protocols during transition), enabling bulk encryption, hash acceleration, advanced accelerators for symmetric cryptography, including AES, SHA2, SHA3, HMAC, and seamless integration with third-party components.
    • PQPlatform-TrustSys can also be deployed with our world-leading fault-tolerance and power/EM side-channel attack countermeasures.
    Block Diagram -- Ultra-Secure, PQC-first, Root-of-Trust Security Platform
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