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PCIe Gen5 IP

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Compare 39 IP from 14 vendors (1 - 10)
  • PCIe Gen5 PHY, x2-lane, RC/EP, TSMC 12FFC, N/S orientation
    • Fully compliant with PCI Express Base 5.0 electrical specification
    • Compliant with PIPE5.2 (PCIe) specification
    • Supports all power saving modes (P0, P0s, P1, P2) defined in the PIPE5.2 specification
    • Supports L1 PM Substates with CLKREQ#
    Block Diagram -- PCIe Gen5 PHY, x2-lane, RC/EP, TSMC 12FFC, N/S orientation
  • High Performance, Low Latency PCIe Gen5 PHY
    • 8 lane PCIe 32/16/8/5/2.5 Gbps per lane
    • Tight skew control of less than 1UI between lanes of the PMA
    Block Diagram -- High Performance, Low Latency PCIe Gen5 PHY
  • PCIE Gen5 digital controller
    • Compliant with Pipe 5.x
    • The flexible and easy user interface
    • Compliant with ATS Specification
    • Compliant with SR-10v Specifications
  • PCIe 5.0 (Gen5) Standard Controller with AMBA bridge II
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 5.0 (Gen5) Standard Controller with AMBA bridge II
  • PCIe 5.0 (Gen5) Standard Controller EP/RP/DM/SW 32-128 bits with AMBA bridge
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 5.0 (Gen5) Standard Controller EP/RP/DM/SW 32-128 bits with AMBA bridge
  • PCIe 5.0 (Gen5) Standard Controller EP/RP/DM/SW 32-128 bits
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 5.0 (Gen5) Standard Controller EP/RP/DM/SW 32-128 bits
  • PCIe 5.0 (Gen5) Premium Controller with AMBA bridge II
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 5.0 (Gen5) Premium Controller with AMBA bridge II
  • PCIe 5.0 (Gen5) Premium Controller II
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 5.0 (Gen5) Premium Controller II
  • PCIe 5.0 (Gen5) Premium Controller EP/RP/DM/SW 32-512 bits with AMBA bridge + LTI and MSI-GIC interfaces
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 5.0 (Gen5) Premium Controller EP/RP/DM/SW 32-512 bits with AMBA bridge + LTI and MSI-GIC interfaces
  • PCIe 5.0 (Gen5) Premium Controller EP/RP/DM/SW 32-512 bits with AMBA bridge
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 5.0 (Gen5) Premium Controller EP/RP/DM/SW 32-512 bits with AMBA bridge
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