PCIe 4.0 IP
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556
IP
from 29 vendors
(1
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10)
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PCIe 4.0 PHY, TSMC7FF x4, North/South (vertical) poly orientation
- Compliant with the PCI Express (PCIe®) 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE)
- Supports lane margining at the receiver
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PCIe 4.0 PHY, TSMC7FF x2, North/South (vertical) poly orientation
- Compliant with the PCI Express (PCIe®) 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE)
- Supports lane margining at the receiver
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PCIe 4.0 PHY, TSMC16FFC x4, North/South (vertical) poly orientation
- Compliant with the PCI Express (PCIe®) 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE)
- Supports lane margining at the receiver
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PCIe 4.0 PHY, TSMC16FFC x2, North/South (vertical) poly orientation
- Compliant with the PCI Express (PCIe®) 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE)
- Supports lane margining at the receiver
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PCIe 4.0 PHY, TSMC16FFC x1, North/South (vertical) poly orientation
- Compliant with the PCI Express (PCIe®) 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE)
- Supports lane margining at the receiver
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PCIe 4.0 LP PHY, TSMC N7RF x1, North/South (vertical) poly orientation
- Compliant with the PCI Express (PCIe®) 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE)
- Supports lane margining at the receiver
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PCIe 4.0 PHY, TSMC N7+ x4, North/South (vertical) poly orientation
- Compliant with the PCI Express (PCIe®) 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE)
- Supports lane margining at the receiver
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PCIe 4.0 LP PHY, TSMC N7 x4, North/South (vertical) poly orientation
- Compliant with the PCI Express (PCIe®) 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE)
- Supports lane margining at the receiver
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PCIe 4.0 LP PHY, TSMC N7 x2, North/South (vertical) poly orientation for Automotive, ASIL B Random, AEC-Q100 Grade 2
- Compliant with the PCI Express (PCIe®) 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE)
- Supports lane margining at the receiver
-
PCIe 4.0 LP PHY, TSMC N7 x2, North/South (vertical) poly orientation
- Compliant with the PCI Express (PCIe®) 4.0, 3.1, 2.1, 1.1, and PIPE specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE)
- Supports lane margining at the receiver
