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MIPI SoundWire IP

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Compare 14 IP from 5 vendors (1 - 10)
  • MIPI SoundWire Slave Controller 1.2
    • MIPI SoundWire®Slave Controller, typically integrated into audio DSP/Codecs or directly into audio peripherals such as Microphones and Amplifiers used in smart phones, tablets and mobile PCs. 
    • The IP when integrated provides SoundWire, a new audio interface to connect to Master typically embedded in Application Processor or Audio Codecs.
    Block Diagram -- MIPI SoundWire Slave Controller 1.2
  • MIPI SoundWire Master Controller 1.2
    • Compliant with MIPI SoundWire specification version 1.2
    • Configurable number of Data Ports Configurable Direction – Source or Sink
    • Implements clock gearbox with programmable frequency divider
    • Implements SoundWire Bus Clock Stop and WakeUp detection
    Block Diagram -- MIPI SoundWire Master Controller 1.2
  • Simulation VIP for MIPI SoundWire
    • Multi-lane Payload Transport
    • Up to 8 data lanes are supported
    • High-PHY Mode
    • High-performance PHY
    Block Diagram -- Simulation VIP for MIPI SoundWire
  • MIPI SoundWire I3S Verification IP
    • Full MIPI SoundWire I3S Master, Slave and Monitor functionality
    • Supports MIPI Soundwire-I3S Bus Draft Specification v0.4r06.
    • Supports system with one master and one or more slaves (upto 8 slaves).
    • Supports LVDS PHY for higher speed and a single-ended CMOS PHY for lower speed systems.
    Block Diagram -- MIPI SoundWire I3S Verification IP
  • MIPI SoundWire Verification IP
    • Full MIPI SoundWire Master, slave and Monitor functionality
    • Supports MIPI SoundWire version 1.2r08 Specifications
    • Supports Basic PHY and High PHY mode
    • Supports IO timing
    Block Diagram -- MIPI SoundWire Verification IP
  • MIPI SOUNDWIRE Synthesizable Transactor
    • Supports MIPI SoundWire version 1.2r08 Specifications
    • Supports full MIPI SoundWire Master,Slave functionality
    • Supports Basic PHY and High PHY mode
    • Supports IO timing
    Block Diagram -- MIPI SOUNDWIRE Synthesizable Transactor
  • MIPI SOUNDWIRE PSVIP
    • Supports MIPI SoundWire version 1.2r08 Specifications
    • Supports full MIPI SoundWire Master,Slave functionality
    • Supports Basic PHY and High PHY mode
    • Supports IO timing
    Block Diagram -- MIPI SOUNDWIRE PSVIP
  • MIPI SOUNDWIRE SLAVE IIP
    • Compliant with MIPI SOUNDWIRE version 1.1x Specification.
    • Full MIPI SOUNDWIRE Slave functionality
    • Supports slave-to-slave transport.
    • Supports upto 8 data lanes.
    Block Diagram -- MIPI SOUNDWIRE SLAVE IIP
  • MIPI SOUNDWIRE MASTER IIP
    • Compliant with MIPI SOUNDWIRE version 1.1x Specification.
    • Full MIPI SOUNDWIRE Master functionality
    • Host can supports upto 11 slaves.
    • Supports upto 8 data lanes.
    Block Diagram -- MIPI SOUNDWIRE MASTER IIP
  • MIPI SOUNDWIRE SLAVE
    • Compliant with MIPI SoundWire Standard 1.1x
    • SoundWire Host can support up to 11 Slaves.
    • Up to 8 Data Lanes supported
    • Slave-to-Slave transport supported
    Block Diagram -- MIPI SOUNDWIRE SLAVE
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