Low-Noise Linear Regulator IP

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Compare 5 IP from 2 vendors (1 - 5)
  • Linear regulator, low-noise optimized for sensitive analog loads such as CODEC and Reference
    • Starring a PSRR of -65 dB at 20 kHz and a low intrinsic noise, combined with a low quiescent current of 110 uA, the nLR-VAIPO helps optimize the power management network for audio handheld applications such as smartphone and tablet.
    • Small footprint: only 0.12 mm2 (including bandgap reference and POK circuit)
    • Minimization of the overall system power, through the support of 3 modes of operation: normal, shutdown and bypass
    • Eases integration in SoC nLR-VAIPO is delivered with behavioral models. These new views enable to build an optimized Power Management Network (PMNet) by verifying mode transitions as well as noise propagation.
    Block Diagram -- Linear regulator, low-noise optimized for sensitive analog loads such as CODEC and Reference
  • Linear regulator, low-noise optimized for sensitive analog loads such as CODEC and Reference
    • Starring a PSRR of -65 dB at 20 kHz and a low intrinsic noise, combined with a low quiescent current of 110 uA, the nLR-VAIPO helps optimize the power management network for audio handheld applications such as smartphone and tablet.
    • Small footprint: only 0.12 mm2 (including bandgap reference and POK circuit)
    • Minimization of the overall system power, through the support of 3 modes of operation: normal, shutdown and bypass
    • Eases integration in SoC nLR-VAIPO is delivered with behavioral models. These new views enable to build an optimized Power Management Network (PMNet) by verifying mode transitions as well as noise propagation.
    Block Diagram -- Linear regulator, low-noise optimized for sensitive analog loads such as CODEC and Reference
  • Linear Regulator, Low-noise optimized for sensitive application such as RF or PLL blocks
    • Low noise: high power Supply Rejection Ratio (PSRR): - 65 dB at F < 10 kHz
    • Low intrinsic noise: 20 uVRMS at 10 Hz to 20 kHz
    • Low Bill-of-Material: optimized in density for the best trade-off for the given output current and input voltage range
    • Cost efficient solution compared to external Power Management.
    Block Diagram -- Linear Regulator, Low-noise optimized for sensitive application such as RF or PLL blocks
  • Linear Regulator for analog island
    • Low-noise enhancement
    • Power Supply Rejection Ratio: - 50 at F&#8804; 10kHz
    • Output Noise: 30 u VRMS at IOUT = IMAX
    • Low Dropout Voltage: 107.3 mV
    Block Diagram -- Linear Regulator for analog island
  • Intelligent Sensor and Power Management Design Platform
    • Smart Power Subsystem
    • Sensor AFE
    • MCU Subsystem
    Block Diagram -- Intelligent Sensor and Power Management Design Platform
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Semiconductor IP