IPsec Packet Engine IP

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Compare 18 IP from 4 vendors (1 - 10)
  • IPsec Engine
    • Can aggregate several 10, 40 or 100 GBE link
    • Throughput from 10 Gbps up to 100 Gbps
    Block Diagram -- IPsec Engine
  • Inline cipher engine for PCIe, CXL, NVMe, 5G FlexE link integrity and data encryption (IDE) using AES GCM mode
    • The ICE-IP-63 (EIP-63) is a scalable high-performance, multi-channel cryptographic engine that offers AES-GCM operations as well as AES-CTR and GMAC on bulk data.
    • Its flexible data path is suitable to scale from 100 Gbps to 2.4 Tbps to provide a tailored engine with minimal area for your application.
    • The FIFO-like data interface makes it possible to perform frame processing for many different protocols, including MACsec, IPsec, and OTN security. 
    Block Diagram -- Inline cipher engine for PCIe, CXL, NVMe, 5G FlexE link integrity and data encryption (IDE) using AES GCM mode
  • High-speed Inline Cipher Engine
    • The ICE-IP-338 data path can be scaled to widths that are multiples of 128 bit to allow a tradeoff between area and performance that best fits the target application.
    • Configuration options include or exclude support for CipherText Stealing (CTS), the GCM mode, and the SM4 algorithm and/or Datapath Integrity logic.
    • The cryptographic AES and SM4 primitives can be provided with or without side channel attack DPA countermeasures.
    Block Diagram -- High-speed Inline Cipher Engine
  • Ethernet Enterprise Switch/Router IP Core - Efficient and Massively Customizable
    • Full wire-speed on all ports and all Ethernet frame sizes.
    • Store and forward shared memory architecture.
    • Support for jumbo packets up to 32739 bytes.
    Block Diagram -- Ethernet Enterprise Switch/Router IP Core - Efficient and Massively Customizable
  • Ethernet IPSec/MACSec Switch/Router IP Core - Efficient and Massively Customizable
    • Full wire-speed on all ports and all Ethernet frame sizes.
    • Store and forward shared memory architecture.
    • Support for jumbo packets up to 32733 bytes.
    Block Diagram -- Ethernet IPSec/MACSec Switch/Router IP Core - Efficient and Massively Customizable
  • Ethernet TSN Switch IP Core - Efficient and Massively Customizable
    • Full wire-speed on all ports for all Ethernet frame sizes.
    • Store and Forward shared memory architecture.
    • Support for Jumbo frame packets of any size limited only by the available packet buffer memory.
    Block Diagram -- Ethernet TSN Switch IP Core - Efficient and Massively Customizable
  • 800G Multi-Channel MACsec Engine with TDM Interface
    • Complete and fully compliant MACsec Packet Engine with classifier and transformation engines for rates of 100 to 800 Gbps, up to 64 channels, ready for FlexE
    • All IEEE MACsec standards supported (including IEEE802.1AE-2018). Optional inclusion of Cisco extensions, IPsec ESP tunnel and transport mode with AES-GCM cipher
    • Supplied with the Driver Development Kit to accelerate time to market. Rambus offers MACsec Toolkit for IEEE 802.1X key management
    Block Diagram -- 800G Multi-Channel MACsec Engine with TDM Interface
  • Fast Inline Cipher Engine, AES-XTS/GCM, SM4-XTS/GCM, DPA
    • One input word per clock without any backpressure
    • Design can switch stream, algorithm, mode, key and/or direction every clock cycle
    • GCM: throughput is solely determined by the data width, data alignment and clock frequency
    • XTS: block processing rate may be limited by the number of configured tweak encryption & CTS cores; a configuration allowing 1 block/clock is available
    Block Diagram -- Fast Inline Cipher Engine, AES-XTS/GCM, SM4-XTS/GCM, DPA
  • Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
    • Protocol aware IPsec, SSL, TLS, DTLS, 3GPP and MACsec Packet Engine with virtualization, caches classifier and Look-Aside interface for multi-core application processors
    • 5-10 Gbps, programmable, maximum CPU offload by classifier, supports new and legacy crypto algorithms, AMBA interface
    • Supported by Driver development kit, QuickSec IPsec toolkit, Linaro ODP, DPDK, Linux Crypto
    Block Diagram -- Multi-Protocol Engine with Classifier, Look-Aside, 5-10 Gbps
  • Multi-Protocol Engine with Classifier, Inline and Look-Aside, 10-100 Gbps
    • Protocol aware IPsec, SSL, TLS, DTLS, 3GPP, MACsec packet engine with classifier and in-line interface for multi-core server processors
    • 10-100 Gbps, programmable, maximum CPU offload by classifier, supports new and legacy crypto algorithms, streaming and AMBA interface
    • Supported by Driver development kit, QuickSec IPsec toolkit, Linaro ODP.
    Block Diagram -- Multi-Protocol Engine with Classifier, Inline and Look-Aside, 10-100 Gbps
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