IEEE 802.3bj Ethernet IP
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12
IP
from 6 vendors
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10)
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IEEE 802.3bj Reed-Solomon Forward Error Correction
- Low latency
- Supports 100 Gigabits
- Configuration and status bus
- Selectable AXI4-Lite interface for status output
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100G Reed-Solomon Codec for Ethernet IEEE 802.3 Clause 91 (803.3bj)
- FEC Sublayer for 100GBASE-CR4 and 100GBASE-KR4 PHY (clause 91 of the IEEE 802.3bj standard).
- 100G Ethernet MAC-friendly interface
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Ethernet TSN Verification IP
- Supports Time Sensitive transmission of data over Ethernet networks
- Full support for IEEE 802.1Qat
- Full support for IEEE 802.1QAV
- Full support for IEEE 802.1Q
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Ethernet - up to 800G Verification IP
- Supports 2.5G and 5G Speeds as per 802.3cb
- 2.5GBASE-KX
- 5GBASE-KR
- 2.5GBASE-T
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Ethernet 40G,100G Verification IP
- Supports 1G
- Supports GMII
- Supports TBI (i.e Output of 8b/10b PCS)
- Supports SGMII(10M/100M/1000M) as per specification 1.8
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Ethernet Synthesizable Transactor
- Supports Full MII/RMII/SMII TX/RX functionality
- Supports Mac control and data frames support
- Ability to generate VLAN tagged and Priority tagged frames
- Supports Pause frame detection and generation
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Ethernet 100G Synthesizable Transactor
- Supports 100G as per 802.3ba and 802.3bj:
- Supports CGMII
- Supports 100GBase-KR10/
- Supports 100GBase-KR4
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Ethernet PCS 100G
- Supports Ethernet speed of 100G
- Complete 100GBASE-R with RS-FEC solution
- Can be used in common 100G Ethernet PHY applications
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100G Ethernet PCS/FEC
- CGPCS Features
- TX 64/66B encode
- TX Scrambling enable/disable
- TX IDLE removal and AM (Alignment Marker) insertion
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UltraScale+ Integrated 100G Ethernet Subsystem
- Optional built-in 100G RS-FEC
- Supports 10 lanes x10.3125 CAUI-10, 4 lanes x25.78125G CAUI-4 or dynamically switchable CAUI-4 and CAUI-10 mode
- Requires license key available at no charge
- 1588 1-step and 2-step hardware time stamping