Ethernet TSN Verification IP

Overview

The Ethernet-TSN Verification IP is compliant with IEEE 802.3 specification. Ethernet Time Sensitive Networking is an emerging IEEE 802.1 standard designed by Time Sensitive Networking (TSN) task group to provide a reliable, high quality of service and low latency solution. It can work with SystemVerilog,Vera, SystemC, E and Verilog HDL environment. Ethernet-TSN Verification IP is developed by experts in Ethernet, who have developed ethernet products in companies like Intel, Cortina-Systems, Emulex, Cisco. We know what it takes to verify a ethernet product.

Ethernet TSN Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

Ethernet TSN Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key Features

  • Supports Time Sensitive transmission of data over Ethernet networks
    • Full support for IEEE 802.1Qat
    • Full support for IEEE 802.1QAV
    • Full support for IEEE 802.1Q
    • Full support for IEEE 802.1AS
    • Full support for IEEE 802.1Qbv
    • Full support for IEEE 802.1Qbu
    • Full support for IEEE 802.1Qca
    • Full support for IEEE 802.1CB
    • Full support for IEEE 802.1Qcc
    • Full support for IEEE 802.1Qci
    • Full support for IEEE 802.1Qch
    • Full support for IEEE 802.1CM
    • Full support for IEEE 802.1Qcr
    • Full support for IEEE 802.3br
    • Full support for IEEE 802.1AB
    • Full support for IEEE 802.1AC
  • Supports 1G
    • Supports GMII
    • Supports TBI (i.e Output of 8b/10b PCS)
    • Supports SGMII as per specification 1.8
    • Supports QSGMII as per specification 1.2
    • Supports USGMII as per specification 3.0 (5G and 10G)
    • Supports RGMII/RTBI as per specification 2.0
    • Supports 1000Base-KX
    • Supports 1GBASE-SX and 1GBASE-LX
    • Supports clause 73 backplane auto-negotiation for 1000Base-KX
    • Supports clause 37 auto-negotiation
    • Supports SGMII auto-negotiation
    • Supports QSGMII auto-negotiation
    • Supports USGMII auto-negotiation and packets
    • Supports full duplex and half duplex of operation
  • Supports 100M
    • Supports MII
    • Supports SMII as per specification 2.1
    • Supports RMII as per specification 1.2
    • Supports 100BASE-FX
  • Supports 200G and 400G Speeds as per 802.3bs
    • 200GBase_KR8
    • 200GBase_KR4
    • 200GBase_KR2
    • 400GBase_KR4
    • 400GBase_KR8
    • 400GBase_KR16
    • Supports CDAUI_16
    • Supports CDMII
    • Supports FEC
    • Supports scrambler
    • Supports backplane auto-negotiation
  • Supports 100G as per 802.3ba and 802.3bj
    • Supports CGMII
    • Supports 100GBase-KR10/100GBase-CR10/100GBase-SR10
    • Supports 100GBase-ER4/100GBase-LR4
    • Supports 100GBase-KR4
    • Supports 100GBase-KR2
    • Supports 100GBase-KR
    • Supports 100GBase-R
    • Supports 100GBASE-KP4 with PMA enable.
    • Supports Gray coding and Precoding as per Spec IEEE 802.3
    • Supports CAUI_4
    • Supports FEC for clause 91(RS_FEC)
    • Supports scrambler
    • Supports backplane auto-negotiation
  • Supports 40G as per 802.3ba
    • Supports XLGMII
    • Supports 40GBase-KR4/40GBase-CR4/40GBase-SR4/40GBase-LR4
    • Supports FEC
    • Supports scrambler
    • Supports backplane auto-negotiation
  • Supports 25G and 50G Speeds
    • 25GBase_R
    • 25GBase_KR
    • 50GBase_KR
    • 50GBase_KR2
    • Supports FEC
    • Supports scrambler
    • Supports backplane auto-negotiation
  • Supports 10G as per 802.3
    • Supports XGMII
    • Supports XTBI (i.e Output of 8b/10b PCS)
    • SUpports XAUI, RXAUI and 10GBASE-KX4
    • Supports 10GBASE-KR with scrambler
    • Supports FEC for 10GBase-KR
    • Supports USXGMII
    • Supports scrambler
    • Supports backplane auto-negotiation for 10GBase-KX4 and 10GBase-KR
  • Full support for IEEE 1588-2002 and IEEE 1588-2008
  • Full support for IEEE 802.1AZ (Energy Efficient Ethernet TSN)
  • TSN protocol can be run over other ethernet speeds also
  • Supports MDIO slave and master model as per Clause 22 and Clause 45
  • Glitch insertion and detection
  • Supports all types of TX and RX errors insertion/detection at each layer.
  • Comes with Tx BFM, Rx BFM, and Monitor
  • Monitor supports detection of all protocol violations
  • Supports Pause frame generation and detection
  • Built in coverage analysis
  • Callbacks in master and slave for various events
  • Status counters for various events in bus

Benefits

  • Faster testbench development and more complete verification of Ethernet-TSN designs
  • Easy to use command interface simplifies testbench control and configuration of TX and RX
  • Simplifies results analysis
  • Runs in every major simulation environment

Block Diagram

Ethernet TSN Verification IP Block Diagram

Deliverables

  • Complete regression suite (UNH) containing all the Ethernet-TSN testcases.
  • Examples showing how to connect various components, and usage of TXRX BFM and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Technical Specifications

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Semiconductor IP