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DO-254 HDLC & SDLC IP

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  • HDLC & SDLC Protocol Controller
    • The HSDLC IP core implements a controller for the High-Level Data Link Control (HDLC) and the Synchronous Data Link Control (SDLC) protocols.
    • It is based on the Intel® 8XC152 Global Serial Channel (GSC) working in SDLC mode, and adds features to support HDLC or proprietary frame transmission under host processor control. 
    • The core operates as a peripheral to a host processor, and is easy to integrate with both modern and legacy processors.
    Block Diagram -- HDLC & SDLC Protocol Controller
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