5nm FinFET Power Management IP

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PHY for PCIe 6.0 and CXL for TSMC 5nm FinFet
- DSP-based Long Reach (LR) equalization and clock data recovery (CDR) provide superior performance and reliability
- Low active and standby power consumption, supports L1 sub-states standby power management
- Extensive set of isolation, test modes, and loopbacks including APB and JTAG
- Supports lane aggregation and bifurcation